Presentation	2003/6/7 Quasi-millimeter-wave high power FET with embedded 0.2μm gates in SiO_2 Kensuke KASAHARA, Katsumi YAMANOGUCHI, Yasuhiro MURASE, Kouji MATSUNAGA,
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Abstract(in English)	Quasi-millimeter-wave high power FET with embedded O.2μm gates in SiO_2 was developed using 5 inch wafer. This process exhibited high yield, high-uniformity, high reproducibility and high device performances. Vt uniformity of 3σ/Average 6% in 5inch wafers is obtained for 0.2μm gate FETs. The FET characteristics are Imax of 540mA/mm, gm of 430mS/mm, MSG of 13dB@30GHz. The FET with gate width Wg=0.45mm showed power density of 0.73W/mm, PAE of 54% at 20GHz.
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Keyword(in English)	GaAs / FET / Power Devices
Paper #	ED2003-61
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Committee	ED
Conference Date	2003/6/7(1days)
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Paper Information
Registration To	Electron Devices (ED)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Quasi-millimeter-wave high power FET with embedded 0.2μm gates in SiO_2
Sub Title (in English)
Keyword(1)	GaAs
Keyword(2)	FET
Keyword(3)	Power Devices
1st Author's Name	Kensuke KASAHARA
1st Author's Affiliation	NEC Photonic and Wireless Devices Research Labs.()
2nd Author's Name	Katsumi YAMANOGUCHI
2nd Author's Affiliation	NEC Photonic and Wireless Devices Research Labs.
3rd Author's Name	Yasuhiro MURASE
3rd Author's Affiliation	NEC Photonic and Wireless Devices Research Labs.
4th Author's Name	Kouji MATSUNAGA
4th Author's Affiliation	NEC Photonic and Wireless Devices Research Labs.
Date	2003/6/7
Paper #	ED2003-61
Volume (vol)	vol.103
Number (no)	118
Page	pp.pp.-
#Pages	6
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