| Presentation | 2004/1/29 A New Approach to reduce Power Supply Voltage Drop in Scan Testing Takaki Yoshida, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | As semiconductor manufacturing technology advances, power dissipation and noise in scan testing have become a critical problems. In our studies on practical LSI manufacturing, we have found that power supply voltage drops cause testing problems during shift operations in scan testing and we have analyzed this phenomenon and its causes. In this paper, we present a new testing method named MD-SCAN (Multi-Duty Scan) which solves power supply voltage drop problems in scan testing, as well as offering an efficient method of application. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Power supply voltage drop / Noise / Low power / Scan test / Clock duty |
| Paper # | CPM2003-169,ICD2003-208 |
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| Conference Information | |
| Committee | CPM |
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| Conference Date | 2004/1/29(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Component Parts and Materials (CPM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A New Approach to reduce Power Supply Voltage Drop in Scan Testing |
| Sub Title (in English) | |
| Keyword(1) | Power supply voltage drop |
| Keyword(2) | Noise |
| Keyword(3) | Low power |
| Keyword(4) | Scan test |
| Keyword(5) | Clock duty |
| 1st Author's Name | Takaki Yoshida |
| 1st Author's Affiliation | Matshusita Electric Industrial Co., Ltd.() |
| Date | 2004/1/29 |
| Paper # | CPM2003-169,ICD2003-208 |
| Volume (vol) | vol.103 |
| Number (no) | 645 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |