Presentation 2003/7/11
Design of element of Neural Network used SFQ Logic Circuit
Taizo KONDO, Itsuhei SHIMIZU, Masayuki KOBORI, Takeshi ONOMI, Koji NAKAJIMA,
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Abstract(in English) In order to realize Stochastic Neuro System using SFQ logic circuit, we design and propose circuits required for neural elements. We design and simulate the multiplication circuit of an input and a weight value, the generation circuit of membrane potential, and propose the circuit of an activation function. Especially, based multiplication circuits, we examine and make a comparison between the comparator based and the rate multiplier based multiplication circuits.
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Keyword(in English) Stochastic / Neural Network / Single Flux Quantum / Superconductivity
Paper # SCE2003-13
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Committee SCE
Conference Date 2003/7/11(1days)
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Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of element of Neural Network used SFQ Logic Circuit
Sub Title (in English)
Keyword(1) Stochastic
Keyword(2) Neural Network
Keyword(3) Single Flux Quantum
Keyword(4) Superconductivity
1st Author's Name Taizo KONDO
1st Author's Affiliation Research Institute of Electrical Communication, Tohoku University Laboratory for Electronic Intelligent System, R. I. E. C., Tohoku Univ.()
2nd Author's Name Itsuhei SHIMIZU
2nd Author's Affiliation Research Institute of Electrical Communication, Tohoku University Laboratory for Electronic Intelligent System, R. I. E. C., Tohoku Univ.
3rd Author's Name Masayuki KOBORI
3rd Author's Affiliation Research Institute of Electrical Communication, Tohoku University Laboratory for Electronic Intelligent System, R. I. E. C., Tohoku Univ.
4th Author's Name Takeshi ONOMI
4th Author's Affiliation Research Institute of Electrical Communication, Tohoku University Laboratory for Electronic Intelligent System, R. I. E. C., Tohoku Univ.
5th Author's Name Koji NAKAJIMA
5th Author's Affiliation Research Institute of Electrical Communication, Tohoku University Laboratory for Electronic Intelligent System, R. I. E. C., Tohoku Univ.
Date 2003/7/11
Paper # SCE2003-13
Volume (vol) vol.103
Number (no) 211
Page pp.pp.-
#Pages 6
Date of Issue