| Presentation | 2003/1/22 A High-Speed Multi-Channel Test Fixture for Superconducting Integrated Circuit Chip Masahiro AOYAGI, Katsuya KIKUCHI, Yuichiro SATO, Hiroshi NAKAGAWA, Hiroshi SATO, Kazuhiko TOKORO, Hiroshi AKOH, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have designed and fabricated a cryogenic test fixture for functional testing of digital and analogue superconducting integrated circuits (IC) in the GHz frequency range. The test fixture consists of a ball grid array (BGA) chip carrier, a detachable BGA socket, a coaxial printed wiring board, and 40 long coaxial cables with SMA connectors. The chip carrier has a microstrip wiring and solder balls. On the chip carrier, a superconducting IC chip is connected using Al wire bonding. The wiring board has a coaxial wiring structure. The wiring characteristic impedance of the chip carrier and the print wiring board was designed to be 50 Ω. In the BGA socket, the BGA chip carrier is electrically connected to the printed wiring board using anisotropic conductive rubber sheet. The coaxial cables are connected to the printed wiring board with soldering. All parts of the system were made with non-magnetic materials. The high frequency characteristics were partially evaluated by TDR measurement and S parameter measurement at 4.2K, 77K and room temperature. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Test Fixture / Cryogenic / Superconducting / Integrated Circuit |
| Paper # | SCE2002-38 |
| Date of Issue |
| Conference Information | |
| Committee | SCE |
|---|---|
| Conference Date | 2003/1/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A High-Speed Multi-Channel Test Fixture for Superconducting Integrated Circuit Chip |
| Sub Title (in English) | |
| Keyword(1) | Test Fixture |
| Keyword(2) | Cryogenic |
| Keyword(3) | Superconducting |
| Keyword(4) | Integrated Circuit |
| 1st Author's Name | Masahiro AOYAGI |
| 1st Author's Affiliation | Nano-electronics Institute(NeRI),National Institute of Advanced Industrial Science and Technology(AIST)() |
| 2nd Author's Name | Katsuya KIKUCHI |
| 2nd Author's Affiliation | Nano-electronics Institute(NeRI),National Institute of Advanced Industrial Science and Technology(AIST) |
| 3rd Author's Name | Yuichiro SATO |
| 3rd Author's Affiliation | R&D Division,Shinwa Corp.Ltd. |
| 4th Author's Name | Hiroshi NAKAGAWA |
| 4th Author's Affiliation | Nano-electronics Institute(NeRI),National Institute of Advanced Industrial Science and Technology(AIST) |
| 5th Author's Name | Hiroshi SATO |
| 5th Author's Affiliation | Nano-electronics Institute(NeRI),National Institute of Advanced Industrial Science and Technology(AIST) |
| 6th Author's Name | Kazuhiko TOKORO |
| 6th Author's Affiliation | Nano-electronics Institute(NeRI),National Institute of Advanced Industrial Science and Technology(AIST) |
| 7th Author's Name | Hiroshi AKOH |
| 7th Author's Affiliation | Nano-electronics Institute(NeRI),National Institute of Advanced Industrial Science and Technology(AIST) |
| Date | 2003/1/22 |
| Paper # | SCE2002-38 |
| Volume (vol) | vol.102 |
| Number (no) | 612 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |