Presentation 2002/11/28
Fabrication of On-chip Double Relaxation Oscillation SQUID with a Digital Flux Locked Loop Circuit
Tomokazu Ookawa, Katsuya Kikuchi, Hiroshi Nakagawa, Kazuhiko Tokoro, Masahiro Aoyagi, Hiroaki Myoren, Susumu Takada,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) On-chip double relaxation oscillation SQUID (DROS) with a digital flux locked loop (FLL) circuit was demonstrated for high sensitive magnetic flux sensor and SQUID amplifier. A digital FLL circuit is composed of a 6-bit Up/Down counter and a 6-bit R-2R ladder-type D/A converter. Each circuit has designed using 4JL-gates which are driven by a two-phase power supply. Dynamic simulation was done for whole circuit at a frequency of 670 MHz. The DROS layout was carried out using 6 kinds of logic cells based on a standard cell method. The digital DROS was fabricated using a Nb/AlO_x/Nb junction technology with a minimum line width of 3 μm. The on-chip DROS circuit occupied an area of 1.9 mm × 3 mm.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Digital SQUID / DROS / 4JL Gate / Up-Down Counter / D / A Converter
Paper # SCE2002-23
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Conference Information
Committee SCE
Conference Date 2002/11/28(1days)
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Paper Information
Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Fabrication of On-chip Double Relaxation Oscillation SQUID with a Digital Flux Locked Loop Circuit
Sub Title (in English)
Keyword(1) Digital SQUID
Keyword(2) DROS
Keyword(3) 4JL Gate
Keyword(4) Up-Down Counter
Keyword(5) D
Keyword(6) A Converter
1st Author's Name Tomokazu Ookawa
1st Author's Affiliation Saitama University()
2nd Author's Name Katsuya Kikuchi
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
3rd Author's Name Hiroshi Nakagawa
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
4th Author's Name Kazuhiko Tokoro
4th Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
5th Author's Name Masahiro Aoyagi
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
6th Author's Name Hiroaki Myoren
6th Author's Affiliation Saitama University
7th Author's Name Susumu Takada
7th Author's Affiliation Saitama University
Date 2002/11/28
Paper # SCE2002-23
Volume (vol) vol.102
Number (no) 480
Page pp.pp.-
#Pages 4
Date of Issue