| Presentation | 2002/11/28 Proposal of an On-Chip SFQ Phase-Locked Loop Circuit Itaru Kurosawa, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The generation and distribution of clock pulses for high-speed SFQ (single flux quantum) circuits, where data and clock are the form of SFQ pulse train, is a very important technology. A stable high-frequency on-chip clock is needed for a variety of applications. Both short-term stability and long-term stability of the clock have critical effects on the performance of the digital systems. It is well known that the long-term clock stability is obtained by using a phase-locked loop (PLL) to synchronize the clock with an external stable reference signal. We have proposed an on-chip SFQ PLL circuit consisting of a phase detector, a loop filter and a feed back loop. The phase detector is a SQUID loop placed in Josephson transmission lines (JTLs) propagating the clock and the reference SFQ pulses. The phase difference detected is amplified by a SQUID amplifier and fed back to the Josephson oscillator through a low pass filter. A JSIM computer simulation has confirmed the proper locked oscillation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Single Flux Quantum Circuit / RSFQ Circuit / Phase-Locked Loop |
| Paper # | SCE2002-22 |
| Date of Issue |
| Conference Information | |
| Committee | SCE |
|---|---|
| Conference Date | 2002/11/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Proposal of an On-Chip SFQ Phase-Locked Loop Circuit |
| Sub Title (in English) | |
| Keyword(1) | Single Flux Quantum Circuit |
| Keyword(2) | RSFQ Circuit |
| Keyword(3) | Phase-Locked Loop |
| 1st Author's Name | Itaru Kurosawa |
| 1st Author's Affiliation | Japan Women's University() |
| Date | 2002/11/28 |
| Paper # | SCE2002-22 |
| Volume (vol) | vol.102 |
| Number (no) | 480 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |