| Presentation | 2003/7/10 Memory Access Scheme for an Indirect Addressing DSPs with Multiple Address Registers Hiromu Sakata, Yuhei Kaneko, Nobuhiko Sugino, Akinori Nishihara, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Memory Access Scheme for an Indirect Addressing DSPs with Multiple Address Registers. For an indirect addressing DSP with auto-modification operations onto multiple address registers (ARs), an AR assignment method is coupled with memory allocation method and a novel memory access scheme is proposed. For a given memory access sequence, the scheme determines address allocation of program variables, and then divides it into subsequences, so that each subsequence is efficiently accessed by a respective AR. At the same time, memory allocation of program variables is rearranged for further reduction in overhead codes for memory accesses. The proposed methods are applied to the existing compiler, and codes generated for several examples include less memory access overhead than those by conventional non-coupling method. Computational complexity of the method is also evaluated for various access sequences. Elapsed time of the method is also evaluated for various access sequences. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DSP / indirect addressing / AR assignment method / memory allocation method |
| Paper # | DSP2003-81,WBS2003-49 |
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| Conference Information | |
| Committee | WBS |
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| Conference Date | 2003/7/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Wideband System(WBS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Memory Access Scheme for an Indirect Addressing DSPs with Multiple Address Registers |
| Sub Title (in English) | |
| Keyword(1) | DSP |
| Keyword(2) | indirect addressing |
| Keyword(3) | AR assignment method |
| Keyword(4) | memory allocation method |
| 1st Author's Name | Hiromu Sakata |
| 1st Author's Affiliation | Dept. of Advanced Applied Electronics, Tokyo Institute of Technology() |
| 2nd Author's Name | Yuhei Kaneko |
| 2nd Author's Affiliation | Dept. of Advanced Applied Electronics, Tokyo Institute of Technology |
| 3rd Author's Name | Nobuhiko Sugino |
| 3rd Author's Affiliation | Dept. of Advanced Applied Electronics, Tokyo Institute of Technology |
| 4th Author's Name | Akinori Nishihara |
| 4th Author's Affiliation | Center for Research and Development of Educational Technology, Tokyo Institute of Technology |
| Date | 2003/7/10 |
| Paper # | DSP2003-81,WBS2003-49 |
| Volume (vol) | vol.103 |
| Number (no) | 194 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |