Presentation 2004/7/23
Study on Implementation of Realtime Ethernet
Kenji TODA, Kenji SAYANO,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We are developing an experimental Gigabit Ethernet board using FPGA. This article describes the specification and usage of the borad.
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Keyword(in English) Realtime Ethernet / Priority Control / Ether switch / Gigabit Ethernet / FPGA / REX2
Paper # DC2004-15
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Committee DC
Conference Date 2004/7/23(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Study on Implementation of Realtime Ethernet
Sub Title (in English)
Keyword(1) Realtime Ethernet
Keyword(2) Priority Control
Keyword(3) Ether switch
Keyword(4) Gigabit Ethernet
Keyword(5) FPGA
Keyword(6) REX2
1st Author's Name Kenji TODA
1st Author's Affiliation Information Technology Research Institute, National Institute of Advanced Industrial Science and Technology (AIST)()
2nd Author's Name Kenji SAYANO
2nd Author's Affiliation AIST, Rexeon Technology
Date 2004/7/23
Paper # DC2004-15
Volume (vol) vol.104
Number (no) 239
Page pp.pp.-
#Pages 5
Date of Issue