Presentation 2004/2/13
Classification of Sequential Circuits Based on Combinational Test Generation Complexity
Chia Yee OOI, Hideo FUJIWARA,
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Abstract(in English) In this paper, we introduce a new test generation notation called τ^k notation, which consists of τ^k-equivalent and τ^k-bounded, in order to clarify the classification of sequential circuits based on combinational test generation complexity. We reconsider the test generation complexity for the existing classes of acyclic sequential circuits. We also propose FSR scan design technique as a DFT method and examine the test generation complexity for the augmented circuits. Three classes of sequential circuits that cover some cyclic sequential circuits have been identified as being T-equivalent and τ^k-bounded.
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Keyword(in English) test generation complexity / τ^k notation / easily testable / design for testability
Paper # DC2003-101
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Committee DC
Conference Date 2004/2/13(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Classification of Sequential Circuits Based on Combinational Test Generation Complexity
Sub Title (in English)
Keyword(1) test generation complexity
Keyword(2) τ^k notation
Keyword(3) easily testable
Keyword(4) design for testability
1st Author's Name Chia Yee OOI
1st Author's Affiliation Graduate School of Information Science, Nara Institute of Science and Technology Kansai Science City()
2nd Author's Name Hideo FUJIWARA
2nd Author's Affiliation Graduate School of Information Science, Nara Institute of Science and Technology Kansai Science City
Date 2004/2/13
Paper # DC2003-101
Volume (vol) vol.103
Number (no) 668
Page pp.pp.-
#Pages 6
Date of Issue