Presentation 2004/2/13
Analog LSI Relation Among Measurement Accuracy, Yield, and Test Time
Hideo KOHlNATA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) As the integration of LSI is getting rapidly higher and circuit size is getting bigger, the bigger LSI test cost due to longer test time in LSI production becomes more serious. This paper will discuss how much impact Mixed LSI measurement accuracy affects test time and LSI yield analyzing the actual results in production test. It will be practical and effective example to the semiconductor industry to show the actual relation among measurement accuracy, test time, and yield based on the actual test data.
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Keyword(in English) Test Time / Yield / Measurement Accuracy / Analog LSI / FFT / DSP
Paper # DC2003-93
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Conference Date 2004/2/13(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Analog LSI Relation Among Measurement Accuracy, Yield, and Test Time
Sub Title (in English)
Keyword(1) Test Time
Keyword(2) Yield
Keyword(3) Measurement Accuracy
Keyword(4) Analog LSI
Keyword(5) FFT
Keyword(6) DSP
1st Author's Name Hideo KOHlNATA
1st Author's Affiliation Automated Test Group, Agilent Technologies Japan Ltd.()
Date 2004/2/13
Paper # DC2003-93
Volume (vol) vol.103
Number (no) 668
Page pp.pp.-
#Pages 4
Date of Issue