| Presentation | 2003/11/21 Program-Based Delay Fault Self-Testing of Processor Cores Virendra Singh, Michiko Inoue, Kewal K Saluja, Hideo Fujiwara, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes an efficient methodology of delay fault testing of processor cores using its instruction set. These test vectors can be applied in the functional mode of operation, hence, self-testing of processor core becomes possible. A delay fault will affect the circuit functionality only when it can be activated in functional mode. There are some paths, which are never excited in the functional mode of operation; hence these are functionally untestable paths. The proposed approach uses a graph theoretic model (represented as an Instruction Execution Graph) of the datapath and a finite state machine model of the controller for the elimination of functionally untestable paths at the early stage without looking into the circuit details and extraction of constraints for the the paths that can potentially be tested. Path delay fault model is used. The experimental results on Parwan processor demonstrate the effectiveness of our method. |
| Keyword(in Japanese) | (See Japanese page) |
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| Paper # | DC2003-37 |
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| Committee | DC |
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| Conference Date | 2003/11/21(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Program-Based Delay Fault Self-Testing of Processor Cores |
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| 1st Author's Name | Virendra Singh |
| 1st Author's Affiliation | Nara Institute of Science & Technology, Ikoma:Central Electronics Engineering Research Institute() |
| 2nd Author's Name | Michiko Inoue |
| 2nd Author's Affiliation | Nara Institute of Science & Technology, Ikoma |
| 3rd Author's Name | Kewal K Saluja |
| 3rd Author's Affiliation | University of Wisconsin - Madison, U.S.A |
| 4th Author's Name | Hideo Fujiwara |
| 4th Author's Affiliation | Nara Institute of Science & Technology, Ikoma |
| Date | 2003/11/21 |
| Paper # | DC2003-37 |
| Volume (vol) | vol.103 |
| Number (no) | 480 |
| Page | pp.pp.- |
| #Pages | 6 |
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