Presentation 2003/2/14
MD-SCAN Method for Low Power Scan Testing
Takaki Yoshida, Masafumi Watari,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) As semiconductor manufacturing technology advances, power dissipation and noise in scan testing have become critical problems. Our studies on practical LSI manufacturing show that power supply voltage drop causes testing problems during shift operations in scan testing. In this paper, we present a new testing method named MD-SCAN (Multi Duty-Scan) which solves power supply voltage drop problems, as well as its experimental results applied to practical LSI chips.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Power supply voltage drop / Noise / Low power / Scan test / Clock duty
Paper # DC2002-87
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Committee DC
Conference Date 2003/2/14(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) MD-SCAN Method for Low Power Scan Testing
Sub Title (in English)
Keyword(1) Power supply voltage drop
Keyword(2) Noise
Keyword(3) Low power
Keyword(4) Scan test
Keyword(5) Clock duty
1st Author's Name Takaki Yoshida
1st Author's Affiliation Matshusita Electric Industrial Co., Ltd.()
2nd Author's Name Masafumi Watari
2nd Author's Affiliation Matshusita Electric Industrial Co., Ltd.
Date 2003/2/14
Paper # DC2002-87
Volume (vol) vol.102
Number (no) 658
Page pp.pp.-
#Pages 6
Date of Issue