Presentation | 2002/11/29 Formal Verification of Self-Testing Property of Combinational Circuits and its Parallelization Shinji OKAMOTO, Kazuo KAWAKUBO, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In this paper we describe methods of formal verification of self-testing (ST) property of combinational circuits using logic function manipulation and propose their parallelization. First, we describe that the problem of verification of ST property can be transformed to a satisfiability problem of a decision function formed from characteristic functions of a circuit's output code words. The problem can be solved using binary decision diagrams (BDD). Next, we introduce extended BDD (XBDD), by which logic functions can be represented using less nodes than BDD, and show XBDD can be used for the verification method. Finally we propose methods of parallel verification using MPI and show the effectiveness of the proposed methods by experimental results. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | formal verification / self-testing / BDD / parallelization |
Paper # | DC2002-72 |
Date of Issue |
Conference Information | |
Committee | DC |
---|---|
Conference Date | 2002/11/29(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Dependable Computing (DC) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Formal Verification of Self-Testing Property of Combinational Circuits and its Parallelization |
Sub Title (in English) | |
Keyword(1) | formal verification |
Keyword(2) | self-testing |
Keyword(3) | BDD |
Keyword(4) | parallelization |
1st Author's Name | Shinji OKAMOTO |
1st Author's Affiliation | Faculty of Engineering, Fukuyama University() |
2nd Author's Name | Kazuo KAWAKUBO |
2nd Author's Affiliation | Faculty of Engineering, Fukuyama University |
Date | 2002/11/29 |
Paper # | DC2002-72 |
Volume (vol) | vol.102 |
Number (no) | 492 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |