Presentation 2002/11/21
Compact Representations of Logic Functions using Heterogeneous MDDs
Shinobu NAGAYAMA, Tsutomu SASAO,
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Abstract(in English) In this paper, we propose a compact representation of logic functions using Multi-valued Decision Diagrams (MDDs) that are called heterogeneous MDDs. The heterogeneous MDDs are generalization of MDDs with k bits (MDD(k)s), where each variable may take different domain. By partitioning input variables and representing each partition as a single multi-valued variables, we can produce the heterogeneous MDDs with 16% smaller amount of memory than the Reduced Ordered Binary Decision Diagrams (ROBDDs), and with as small amount of memory as the Free Binary Decision Diagrams (FBDDs). We minimized a large number of benchmark functions to show the compactness of the heterogeneous MDD.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) heterogeneous MDD / ROBDD / MDD(k) / FBDD / amount of memory / average path length / branch and bound
Paper # DC2002-50
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Conference Date 2002/11/21(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Compact Representations of Logic Functions using Heterogeneous MDDs
Sub Title (in English)
Keyword(1) heterogeneous MDD
Keyword(2) ROBDD
Keyword(3) MDD(k)
Keyword(4) FBDD
Keyword(5) amount of memory
Keyword(6) average path length
Keyword(7) branch and bound
1st Author's Name Shinobu NAGAYAMA
1st Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology()
2nd Author's Name Tsutomu SASAO
2nd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology:Center for Microelectronic Systems, Kyushu Institute of Technology
Date 2002/11/21
Paper # DC2002-50
Volume (vol) vol.102
Number (no) 479
Page pp.pp.-
#Pages 6
Date of Issue