Presentation 2003/2/26
A Prototype Transmitter Using FPGA and Adaptive Antenna Array for High-Speed Mobile Communication System
Shintaro MURAMATSU, Minseok KIM, Koichi ICHIGE, Hiroyuki ARAI,
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Abstract(in English) We developed evaluation system that can control transmit antenna pattern. This system solves the problem of multipath fading and improves the frequency usability by realization of a SDMA (Space Division Multiple Access) technique. This system consists of some FPGAs (Field Programmable Gate Array) and can perform signal processing required for each array antenna element in parallel. This system provides the digital up-conversion (DUC) after QPSK mapping of serial bit stream and the multiplication with complex weights. This paper reports implementation of the digital part of an adaptive array antenna transmitter.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Adaptive Array Antenna / FPGA / Transmit Digital Beamformiug
Paper # SST2002-75,A・P2002-174,RSC2002-291,MoMuC2002-100,MW2002-182
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Committee MoMuC
Conference Date 2003/2/26(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Prototype Transmitter Using FPGA and Adaptive Antenna Array for High-Speed Mobile Communication System
Sub Title (in English)
Keyword(1) Adaptive Array Antenna
Keyword(2) FPGA
Keyword(3) Transmit Digital Beamformiug
1st Author's Name Shintaro MURAMATSU
1st Author's Affiliation Graduate School of Engineering, Yokohama National University()
2nd Author's Name Minseok KIM
2nd Author's Affiliation Graduate School of Engineering, Yokohama National University
3rd Author's Name Koichi ICHIGE
3rd Author's Affiliation Graduate School of Engineering, Yokohama National University
4th Author's Name Hiroyuki ARAI
4th Author's Affiliation Graduate School of Engineering, Yokohama National University
Date 2003/2/26
Paper # SST2002-75,A・P2002-174,RSC2002-291,MoMuC2002-100,MW2002-182
Volume (vol) vol.102
Number (no) 677
Page pp.pp.-
#Pages 6
Date of Issue