Presentation | 2003/12/11 Arbitration-free Time-Division Permutation Switching suitable for All-Optical Implementation Alvaro Cassinelli, Makoto Naruse, Alain Goulet, Masatoshi Ishikawa, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Pursuing high-bandwidth and transparency for optical communications, we propose here a multistage switching fabric whose internal interconnection patterns are periodically reconfigured. Specifically, by cascading guided-wave modules containing each a small set of interleaved, independent addressable plane-to-plane global interconnections, we experimentally demonstrate arbitration-free time-division permutation routing in a transparent multistage architecture suitable for high-bandwidth inter-processor communications in massively parallel machines. Furthermore -and perhaps more interestingly- computer simulations confirms that the addition of small inter-stage buffering nodes (suitable for being implemented as optical fiber delay lines) along with a simple and local packet flow arbitration rule (adapted to the global, periodic interconnection reconfiguration strategy) would lead to fairly good network performance for packet switching applications. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Guided wave optical interconnections / multistage interconnection networks / circuit switching / packet switching |
Paper # | NS2003-201,PN2003-29 |
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Conference Information | |
Committee | NS |
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Conference Date | 2003/12/11(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Network Systems(NS) |
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Language | ENG |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Arbitration-free Time-Division Permutation Switching suitable for All-Optical Implementation |
Sub Title (in English) | |
Keyword(1) | Guided wave optical interconnections |
Keyword(2) | multistage interconnection networks |
Keyword(3) | circuit switching |
Keyword(4) | packet switching |
1st Author's Name | Alvaro Cassinelli |
1st Author's Affiliation | University of Tokyo, Dept. Information Physics and Computing() |
2nd Author's Name | Makoto Naruse |
2nd Author's Affiliation | Communications Research Laboratory |
3rd Author's Name | Alain Goulet |
3rd Author's Affiliation | University of Tokyo, Dept. Information Physics and Computing |
4th Author's Name | Masatoshi Ishikawa |
4th Author's Affiliation | University of Tokyo, Dept. Information Physics and Computing |
Date | 2003/12/11 |
Paper # | NS2003-201,PN2003-29 |
Volume (vol) | vol.103 |
Number (no) | 505 |
Page | pp.pp.- |
#Pages | 5 |
Date of Issue |