Presentation 2003/11/20
A Study on Clock Signal Extraction from 40-Gbit/s and 80-Gbit/s RZ Optical Signals
Shigeyuki Seikai, Kyoichi Oro, Ikuo Yamashita,
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Abstract(in English) Characteristics of clock recovery circuits are experimentally investigated. Three kinds of circuits, phase lock loop (PLL) circuit, injection locking circuit, and circuit composed of a T-Flip-Flop are constructed. As for 80-Gbit/s the input optical signal is down-converted into 40 Gbit/s by an optical modulator droved by the output of the injection locking circuit. Locking frequency ranges, frequency responses, and phase noises are measured and compared among the circuits. The characteristics of the PLL and the injection locking are relatively similar and the T-Flip-Flop circuit shows superior properties except for small dynamic range of input optical power.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Clock Signal / PLL / Injection locking / T-Flip-Flop / 80Gbit/s
Paper # OFT2003-59
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Committee OFT
Conference Date 2003/11/20(1days)
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Registration To Optical Fiber Technology (OFT)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Study on Clock Signal Extraction from 40-Gbit/s and 80-Gbit/s RZ Optical Signals
Sub Title (in English)
Keyword(1) Clock Signal
Keyword(2) PLL
Keyword(3) Injection locking
Keyword(4) T-Flip-Flop
Keyword(5) 80Gbit/s
1st Author's Name Shigeyuki Seikai
1st Author's Affiliation Kansai Electric Power Co. Inc. Power Engineering R&D Center()
2nd Author's Name Kyoichi Oro
2nd Author's Affiliation Kansai Electric Power Co. Inc. Power Engineering R&D Center
3rd Author's Name Ikuo Yamashita
3rd Author's Affiliation Kansai Electric Power Co. Inc. Power Engineering R&D Center
Date 2003/11/20
Paper # OFT2003-59
Volume (vol) vol.103
Number (no) 473
Page pp.pp.-
#Pages 6
Date of Issue