Presentation | 2019-01-30 A CNN with a Noise Addition for Efficient Implementation on an FPGA Atsuki Munakata, Shimpei Satou, Hiroki Nakahara, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This article is a technical report without peer review, and its polished and/or extended version may be published elsewhere. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Deep Learning / CNN / FPGA |
Paper # | VLD2018-75,CPSY2018-85,RECONF2018-49 |
Date of Issue | 2019-01-23 (VLD, CPSY, RECONF) |
Conference Information | |
Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
---|---|
Conference Date | 2019/1/30(2days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | FPGA Applications, etc. |
Chair | Yutaka Tamiya(Fujitsu Lab.) / Masato Motomura(Hokkaido Univ.) / Noriyuki Minegishi(Mitsubishi Electric) / Koji Nakano(Hiroshima Univ.) / Koji Inoue(Kyushu Univ.) |
Vice Chair | / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) |
Secretary | (NEC) / Yuichiro Shibata(Kochi Univ. of Tech.) / Kentaro Sano(NTT) / Nozomu Togawa(Hiroshima City Univ.) / Hidetsugu Irie(e-trees.Japan) / Takashi Miyoshi(NTT) / (Univ. of Aizu) |
Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) |
Paper Information | |
Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A CNN with a Noise Addition for Efficient Implementation on an FPGA |
Sub Title (in English) | |
Keyword(1) | Deep Learning |
Keyword(2) | CNN |
Keyword(3) | FPGA |
1st Author's Name | Atsuki Munakata |
1st Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
2nd Author's Name | Shimpei Satou |
2nd Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
3rd Author's Name | Hiroki Nakahara |
3rd Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
Date | 2019-01-30 |
Paper # | VLD2018-75,CPSY2018-85,RECONF2018-49 |
Volume (vol) | vol.118 |
Number (no) | VLD-430,CPSY-431,RECONF-432 |
Page | pp.pp.19-24(VLD), pp.19-24(CPSY), pp.19-24(RECONF), |
#Pages | 6 |
Date of Issue | 2019-01-23 (VLD, CPSY, RECONF) |