| Presentation | 2019-01-31 Preliminary evaluation of special instruction implementation methods by high level synthesis Ryodai Iwamoto, Naoki Fujieda, Shuichi Ichikawa, Joji Sakamoto, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Protection of intellectual properties and technical know-how is an important issue.In our previous work, we proposed implementing some functions of software as special Instructions of a soft processor generated from an instruction set simulator by using high level synthesis.In this research, we examine this method by applying it to each program of CHStone benchmark.As a criterion for selecting functions to be concealed, a function with a long processing time is preferentially selected, and the influence on the execution time is evaluated. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / specialization / soft-processor |
| Paper # | VLD2018-88,CPSY2018-98,RECONF2018-62 |
| Date of Issue | 2019-01-23 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
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| Conference Date | 2019/1/30(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Yutaka Tamiya(Fujitsu Lab.) / Masato Motomura(Hokkaido Univ.) / Noriyuki Minegishi(Mitsubishi Electric) / Koji Nakano(Hiroshima Univ.) / Koji Inoue(Kyushu Univ.) |
| Vice Chair | / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) |
| Secretary | (NEC) / Yuichiro Shibata(Kochi Univ. of Tech.) / Kentaro Sano(NTT) / Nozomu Togawa(Hiroshima City Univ.) / Hidetsugu Irie(e-trees.Japan) / Takashi Miyoshi(NTT) / (Univ. of Aizu) |
| Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) |
| Paper Information | |
| Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Preliminary evaluation of special instruction implementation methods by high level synthesis |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | specialization |
| Keyword(3) | soft-processor |
| 1st Author's Name | Ryodai Iwamoto |
| 1st Author's Affiliation | Toyohashi University of Technology(TUT) |
| 2nd Author's Name | Naoki Fujieda |
| 2nd Author's Affiliation | Toyohashi University of Technology(TUT) |
| 3rd Author's Name | Shuichi Ichikawa |
| 3rd Author's Affiliation | Toyohashi University of Technology(TUT) |
| 4th Author's Name | Joji Sakamoto |
| 4th Author's Affiliation | Toyohashi University of Technology(TUT) |
| Date | 2019-01-31 |
| Paper # | VLD2018-88,CPSY2018-98,RECONF2018-62 |
| Volume (vol) | vol.118 |
| Number (no) | VLD-430,CPSY-431,RECONF-432 |
| Page | pp.pp.101-106(VLD), pp.101-106(CPSY), pp.101-106(RECONF), |
| #Pages | 6 |
| Date of Issue | 2019-01-23 (VLD, CPSY, RECONF) |