Presentation | 2019-01-17 Hardware-efficient Signal Processing Circuits for 100Gb/s/λ Coherent PON Systems Hiroshi Miura, Keisuke Matsuda, Naoki Suzuki, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We present the 100 Gb/s/lambda-based coherent WDM-PON system with a simplified digital signal processing (DSP) suitable for access spans. The DSP circuits is included a new adaptive equalization (AEQ) and carrier phase recovery (CPR). The AEQ consists a 1-tap butterfly FIR filter and two non-butterfly FIR filters, sacrificing differential group delay (DGD) compensation. This demonstration achieved downstream loss budget of more than 38.9 dB with a hardware-efficient signal processing circuits. This budget corresponds to branching in 8 directions to ONU with transmitting up to 80 km using SMF. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Coherent Optical Access System / Coherent WDM-PON / Hardware-efficient DSP |
Paper # | OCS2018-71 |
Date of Issue | 2019-01-10 (OCS) |
Conference Information | |
Committee | OCS / CS |
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Conference Date | 2019/1/17(2days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Nobumoto Ohama Memorial Hall (Ishigaki Island) |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | Itsuro Morita(KDDI Research) / Hidenori Nakazato(Waseda Univ.) |
Vice Chair | / Jun Terada(NTT) |
Secretary | (NTT) / Jun Terada(Furukawa Electric) |
Assistant | / Kazutaka Hara(NTT) / Kentaro Toyoda(Keio Univ.) |
Paper Information | |
Registration To | Technical Committee on Optical Communication Systems / Technical Committee on Communication Systems |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Hardware-efficient Signal Processing Circuits for 100Gb/s/λ Coherent PON Systems |
Sub Title (in English) | |
Keyword(1) | Coherent Optical Access System |
Keyword(2) | Coherent WDM-PON |
Keyword(3) | Hardware-efficient DSP |
1st Author's Name | Hiroshi Miura |
1st Author's Affiliation | Mitsubishi Electric Corporation(Mitsubishi Electric) |
2nd Author's Name | Keisuke Matsuda |
2nd Author's Affiliation | Mitsubishi Electric Corporation(Mitsubishi Electric) |
3rd Author's Name | Naoki Suzuki |
3rd Author's Affiliation | Mitsubishi Electric Corporation(Mitsubishi Electric) |
Date | 2019-01-17 |
Paper # | OCS2018-71 |
Volume (vol) | vol.118 |
Number (no) | OCS-394 |
Page | pp.pp.19-24(OCS), |
#Pages | 6 |
Date of Issue | 2019-01-10 (OCS) |