| Presentation | 2018-12-21 Developing the evaluation framework of the STRAIGHT architecture Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Satoshi Nakae, Hidetsugu Irie, Shuichi Sakai, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | STRAIGHT architecture has achieved high performance and high efficiency with Coremark and Dhrystone because of its ISA showing dependencies among instructions. The ISA eliminates the need for the register renaming. We implemented the systemcall emulation system for the STRAIGHT simulator, and revealed that STRAIGHT is also effective to more practical benchmarks, 473. astar (SPEC CPU 2006) and RNN. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | STRAIGHT Architecture / ILP / microarchitecture / simulator |
| Paper # | CAS2018-86,ICD2018-70,CPSY2018-52 |
| Date of Issue | 2018-12-14 (CAS, ICD, CPSY) |
| Conference Information | |
| Committee | ICD / CPSY / CAS |
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| Conference Date | 2018/12/21(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Hideto Hidaka(Renesas) / Koji Nakano(Hiroshima Univ.) / Hideaki Okazaki(Shonan Inst. of Tech.) |
| Vice Chair | Makoto Nagata(Kobe Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Taizo Yamawaki(Hitachi) |
| Secretary | Makoto Nagata(Panasonic) / Hidetsugu Irie(Tohoku Univ.) / Takashi Miyoshi(Utsunomiya Univ.) / Taizo Yamawaki(Hokkaido Univ.) |
| Assistant | Hiroyuki Ito(Tokyo Inst. of Tech.) / Masatoshi Tsuge(Socionext) / Tetsuya Hirose(Kobe Univ.) / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Motoi Yamaguchi(Renesas Electronics) |
| Paper Information | |
| Registration To | Technical Committee on Integrated Circuits and Devices / Technical Committee on Computer Systems / Technical Committee on Circuits and Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Developing the evaluation framework of the STRAIGHT architecture |
| Sub Title (in English) | |
| Keyword(1) | STRAIGHT Architecture |
| Keyword(2) | ILP |
| Keyword(3) | microarchitecture |
| Keyword(4) | simulator |
| 1st Author's Name | Akifumi Fukuda |
| 1st Author's Affiliation | The University of Tokyo(UTokyo) |
| 2nd Author's Name | Toru Koizumi |
| 2nd Author's Affiliation | The University of Tokyo(UTokyo) |
| 3rd Author's Name | Junichiro Kadomoto |
| 3rd Author's Affiliation | The University of Tokyo(UTokyo) |
| 4th Author's Name | Satoshi Nakae |
| 4th Author's Affiliation | The University of Tokyo(UTokyo) |
| 5th Author's Name | Hidetsugu Irie |
| 5th Author's Affiliation | The University of Tokyo(UTokyo) |
| 6th Author's Name | Shuichi Sakai |
| 6th Author's Affiliation | The University of Tokyo(UTokyo) |
| Date | 2018-12-21 |
| Paper # | CAS2018-86,ICD2018-70,CPSY2018-52 |
| Volume (vol) | vol.118 |
| Number (no) | CAS-373,ICD-374,CPSY-375 |
| Page | pp.pp.43-47(CAS), pp.43-47(ICD), pp.43-47(CPSY), |
| #Pages | 5 |
| Date of Issue | 2018-12-14 (CAS, ICD, CPSY) |