Presentation 2018-12-07
Process Variation-aware Model-based OPC using 0-1 Quadratic Programming
Rina Azuma, Yukihide Kohira, Tomomi Matsui, Atsushi Takahashi, Chikaaki Kodama, Shigeki Nojima,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Due to continuous shrinking of Critical Dimensions (CD) of layout pattern in VLSI, advances of manufacturing process in optical lithography are required. As a main stream among resolution enhancement techniques, Optical Proximity Correction (OPC), which improves shape ?delity of formed patterns on wafers against designed target patterns by mask correction, is essential to achieve scale down of CD in the optical lithography. In general, mask correction methods in OPC are classi?ed into two classes: rule-based OPC and model-based OPC. Recently, model-based OPC is broadly studied. In this paper, we propose a model-based OPC which formulates the maximization of contrast of intensity around edges of target patterns as 0-1 Quadratic Programming, and which is solved by using Forcing Rule, Gradient Midpoint Method or Gradient Deciding Method. By these proposed methods, shape ?delity and tolerance against process variation are improved simultaneously.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) lithography / lithography simulation / optical proximity correction (OPC) / design for manufacturability (DFM)
Paper # VLD2018-70,DC2018-56
Date of Issue 2018-11-28 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2018/12/5(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Satellite Campus Hiroshima
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2018 -New Field of VLSI Design-
Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Yutaka Tamiya(Fujitsu Laboratories) / 渡辺 晴美(東海大) / 井上 弘士(九大)
Vice Chair Nozomu Togawa(Waseda Univ.) / Hiroshi Takahashi(Ehime Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Kazuya Kodama(NII)
Secretary Nozomu Togawa(NTT) / Hiroshi Takahashi(Aizu Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Takashi Miyoshi(Nihon Univ.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Hideaki Kimata(Toyohashi Univ. of Tech.) / Kazuya Kodama(NTT) / (Panasonic) / (Tohoku Univ.) / (KDDI Research)
Assistant / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yasuo Kimura(Tokyo Univ. of Tech.) / Hideki Nakazawa(Hirosaki Univ.) / Tomoaki Terasako(Ehime Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Masatoshi Tsuge(Socionext) / Tetsuya Hirose(Kobe Univ.) / Kazuya Hayase(NTT) / Yasutaka Matsuo(NHK) / Hiroe Iwasaki(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Process Variation-aware Model-based OPC using 0-1 Quadratic Programming
Sub Title (in English)
Keyword(1) lithography
Keyword(2) lithography simulation
Keyword(3) optical proximity correction (OPC)
Keyword(4) design for manufacturability (DFM)
1st Author's Name Rina Azuma
1st Author's Affiliation The University of Aizu(Univ. of Aizu)
2nd Author's Name Yukihide Kohira
2nd Author's Affiliation The University of Aizu(Univ. of Aizu)
3rd Author's Name Tomomi Matsui
3rd Author's Affiliation Tokyo Institute of Technology(Tokyo Tech)
4th Author's Name Atsushi Takahashi
4th Author's Affiliation Tokyo Institute of Technology(Tokyo Tech)
5th Author's Name Chikaaki Kodama
5th Author's Affiliation Toshiba Memory Corporation(TMC)
6th Author's Name Shigeki Nojima
6th Author's Affiliation Toshiba Memory Corporation(TMC)
Date 2018-12-07
Paper # VLD2018-70,DC2018-56
Volume (vol) vol.118
Number (no) VLD-334,DC-335
Page pp.pp.209-214(VLD), pp.209-214(DC),
#Pages 6
Date of Issue 2018-11-28 (VLD, DC)