Presentation 2018-12-06
A Tiny Memory implementation on an FPGA using Feature-Map Separable Convolution Technique
Akira Jinguji, Simpei Sato, Hiroki Nakahara,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Object detection and image recognition using a convolutional neural network (CNN) are used in embedded systems. Embedded systems require reasonable price and power performance. CNN has high accuracy and large computation. In realizing CNN, real-time processing cannot be realized in CPUs, and power consumption is too large in GPUs. The CNN realization of the FPGA is low power consumption, but large on-chip memory are required. Large memory FPGAs are expensive. Feature-map size output in convolution layers is large. This is a bottleneck in FPGA memory resource restrictions. We propose Feature-Map Separable Convolution. This makes an inference with divided feature-map. The feature-map size becomes smaller when an input image size becomes smaller. Thus, the buffer memory can be reduced. By experiments, we accomplished that the accuracy of CNN does not change so much with making buffer memory to 70%.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Deep learning / CNN / FPGA
Paper # RECONF2018-41
Date of Issue 2018-11-28 (RECONF)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2018/12/5(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Satellite Campus Hiroshima
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2018 -New Field of VLSI Design-
Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Yutaka Tamiya(Fujitsu Laboratories) / 渡辺 晴美(東海大) / 井上 弘士(九大)
Vice Chair Nozomu Togawa(Waseda Univ.) / Hiroshi Takahashi(Ehime Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Kazuya Kodama(NII)
Secretary Nozomu Togawa(NTT) / Hiroshi Takahashi(Aizu Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Takashi Miyoshi(Nihon Univ.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Hideaki Kimata(Toyohashi Univ. of Tech.) / Kazuya Kodama(NTT) / (Panasonic) / (Tohoku Univ.) / (KDDI Research)
Assistant / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yasuo Kimura(Tokyo Univ. of Tech.) / Hideki Nakazawa(Hirosaki Univ.) / Tomoaki Terasako(Ehime Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Masatoshi Tsuge(Socionext) / Tetsuya Hirose(Kobe Univ.) / Kazuya Hayase(NTT) / Yasutaka Matsuo(NHK) / Hiroe Iwasaki(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Tiny Memory implementation on an FPGA using Feature-Map Separable Convolution Technique
Sub Title (in English)
Keyword(1) Deep learning
Keyword(2) CNN
Keyword(3) FPGA
1st Author's Name Akira Jinguji
1st Author's Affiliation Tokyo Institute of Technology(titech)
2nd Author's Name Simpei Sato
2nd Author's Affiliation Tokyo Institute of Technology(titech)
3rd Author's Name Hiroki Nakahara
3rd Author's Affiliation Tokyo Institute of Technology(titech)
Date 2018-12-06
Paper # RECONF2018-41
Volume (vol) vol.118
Number (no) RECONF-340
Page pp.pp.39-44(RECONF),
#Pages 6
Date of Issue 2018-11-28 (RECONF)