Presentation 2018-12-05
Design Automation and Optimal Architecture of NLoC
Yuto Umeda, Shigeru Yamashita,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In Networked Labs-on-Chip (NLoC), droplets of reagents flow in closed channels. It is expected that the discrete model of NLoC would make design automation possible. However, there has not proposed a design automation method of NLoC yet. In this paper, we propose a design automation method of NLoC in the discrete model. We formulate the conditions necessary for designing architectures, and then we use an ILP solver to find a solution satisfying the condition. The method achieves the design automation of NLoC that makes multiple experiments possible. Also, we present architectures that make all experiments possible with one header droplet.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Networked Labs-on-Chip / droplet routing / discrete model / ILP solver / formulation
Paper # VLD2018-40,DC2018-26
Date of Issue 2018-11-28 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2018/12/5(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Satellite Campus Hiroshima
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2018 -New Field of VLSI Design-
Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Yutaka Tamiya(Fujitsu Laboratories) / 渡辺 晴美(東海大) / 井上 弘士(九大)
Vice Chair Nozomu Togawa(Waseda Univ.) / Hiroshi Takahashi(Ehime Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Kazuya Kodama(NII)
Secretary Nozomu Togawa(NTT) / Hiroshi Takahashi(Aizu Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Takashi Miyoshi(Nihon Univ.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Hideaki Kimata(Toyohashi Univ. of Tech.) / Kazuya Kodama(NTT) / (Panasonic) / (Tohoku Univ.) / (KDDI Research)
Assistant / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yasuo Kimura(Tokyo Univ. of Tech.) / Hideki Nakazawa(Hirosaki Univ.) / Tomoaki Terasako(Ehime Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Masatoshi Tsuge(Socionext) / Tetsuya Hirose(Kobe Univ.) / Kazuya Hayase(NTT) / Yasutaka Matsuo(NHK) / Hiroe Iwasaki(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design Automation and Optimal Architecture of NLoC
Sub Title (in English)
Keyword(1) Networked Labs-on-Chip
Keyword(2) droplet routing
Keyword(3) discrete model
Keyword(4) ILP solver
Keyword(5) formulation
1st Author's Name Yuto Umeda
1st Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
2nd Author's Name Shigeru Yamashita
2nd Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
Date 2018-12-05
Paper # VLD2018-40,DC2018-26
Volume (vol) vol.118
Number (no) VLD-334,DC-335
Page pp.pp.1-6(VLD), pp.1-6(DC),
#Pages 6
Date of Issue 2018-11-28 (VLD, DC)