Presentation 2018-12-05
Improved Routing Method for Two Layer Self-Aligned Double Patterning
Shoya Tamura, Kunihiro Fujiyoshi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Self-Aligned Double Patterning (SADP) enables us to fabricate fine wiring under ArF immersion lithography. However, when multi-layer routing is performed, vias have to be greatly thickened because techniques for manufacturing fine vias are immature. Therefore, we extended the channel routing method which can wire efficiently on the basis of the VH routing, and proposed a two-layer routing method corresponding to a significantly thick vias. In this method, x-coordinate of each via is determined by using the constraint graph so that the whole routing can be succeeded with a higher probability. We implemented the proposed method on a computer and confirmed its effectiveness.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Self-Aligned Double Patterning / VH Routing / Channel Routing
Paper # VLD2018-45,DC2018-31
Date of Issue 2018-11-28 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2018/12/5(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Satellite Campus Hiroshima
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2018 -New Field of VLSI Design-
Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Yutaka Tamiya(Fujitsu Laboratories) / 渡辺 晴美(東海大) / 井上 弘士(九大)
Vice Chair Nozomu Togawa(Waseda Univ.) / Hiroshi Takahashi(Ehime Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Kazuya Kodama(NII)
Secretary Nozomu Togawa(NTT) / Hiroshi Takahashi(Aizu Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Takashi Miyoshi(Nihon Univ.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Hideaki Kimata(Toyohashi Univ. of Tech.) / Kazuya Kodama(NTT) / (Panasonic) / (Tohoku Univ.) / (KDDI Research)
Assistant / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yasuo Kimura(Tokyo Univ. of Tech.) / Hideki Nakazawa(Hirosaki Univ.) / Tomoaki Terasako(Ehime Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Masatoshi Tsuge(Socionext) / Tetsuya Hirose(Kobe Univ.) / Kazuya Hayase(NTT) / Yasutaka Matsuo(NHK) / Hiroe Iwasaki(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Improved Routing Method for Two Layer Self-Aligned Double Patterning
Sub Title (in English)
Keyword(1) Self-Aligned Double Patterning
Keyword(2) VH Routing
Keyword(3) Channel Routing
1st Author's Name Shoya Tamura
1st Author's Affiliation Tokyo University of Agriculture and Technology(TUAT)
2nd Author's Name Kunihiro Fujiyoshi
2nd Author's Affiliation Tokyo University of Agriculture and Technology(TUAT)
Date 2018-12-05
Paper # VLD2018-45,DC2018-31
Volume (vol) vol.118
Number (no) VLD-334,DC-335
Page pp.pp.37-42(VLD), pp.37-42(DC),
#Pages 6
Date of Issue 2018-11-28 (VLD, DC)