Presentation 2018-12-06
A Case Study on Memory Architecture Exploration for FPGA-based Manycores
Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In the design of high-performance embedded systems, FPGA-based manycores attract an increasing attention. In embedded system design with FPGA-based manycore architectures, it is important to optimize not only the number and topology of cores but also memory architecture in order to achieve high performance under limited FPGA resources. This paper presents a case study on memory architecture exploration for FPGA-based manycores. We design and implement three types of 33 core architectures on an FPGA, and evaluate the performance of the three architectures.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) design space exploration / memory architecture / manycores / FPGA
Paper # VLD2018-53,DC2018-39
Date of Issue 2018-11-28 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2018/12/5(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Satellite Campus Hiroshima
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2018 -New Field of VLSI Design-
Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Yutaka Tamiya(Fujitsu Laboratories) / 渡辺 晴美(東海大) / 井上 弘士(九大)
Vice Chair Nozomu Togawa(Waseda Univ.) / Hiroshi Takahashi(Ehime Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Kazuya Kodama(NII)
Secretary Nozomu Togawa(NTT) / Hiroshi Takahashi(Aizu Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Takashi Miyoshi(Nihon Univ.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Hideaki Kimata(Toyohashi Univ. of Tech.) / Kazuya Kodama(NTT) / (Panasonic) / (Tohoku Univ.) / (KDDI Research)
Assistant / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yasuo Kimura(Tokyo Univ. of Tech.) / Hideki Nakazawa(Hirosaki Univ.) / Tomoaki Terasako(Ehime Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Masatoshi Tsuge(Socionext) / Tetsuya Hirose(Kobe Univ.) / Kazuya Hayase(NTT) / Yasutaka Matsuo(NHK) / Hiroe Iwasaki(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Case Study on Memory Architecture Exploration for FPGA-based Manycores
Sub Title (in English)
Keyword(1) design space exploration
Keyword(2) memory architecture
Keyword(3) manycores
Keyword(4) FPGA
1st Author's Name Seiya Shirakuni
1st Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
2nd Author's Name Ittetsu Taniguchi
2nd Author's Affiliation Osaka University(Osaka Univ.)
3rd Author's Name Hiroyuki Tomiyama
3rd Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
Date 2018-12-06
Paper # VLD2018-53,DC2018-39
Volume (vol) vol.118
Number (no) VLD-334,DC-335
Page pp.pp.101-106(VLD), pp.101-106(DC),
#Pages 6
Date of Issue 2018-11-28 (VLD, DC)