Presentation 2018-11-29
Instantaneous Power-Line Frequency Synchronized Superimposed Chart of PLC System
Hiroshi Gotoh, Wataru Abe, Ryo Uemura, Kenji Kita, Hiroyasu Ishikawa, Hideyuki Shinonaga,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In the previous study, the authors have proposed a detailed plotting algorithm of Instantaneous Power-Line Frequency Synchronized Superimposed Chart. In the proposed algorithm, the first burst signal plotting position is an arbitrary value. The reason is the position of the communication forbidden time which is different for each measurement data is moved to a position where it is easy to analyze. However, the error of the superimposed chart dependent on the first burst signal plotting position has not been verified. Therefore, in this paper, we indicate the verification method of the first burst signal plotting position dependence by the proposed algorithm and its results.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) PLC / UDP / Charger / Communication forbidden time / Instantaneous Power-Line Frequency Synchronized Superimposed Chart / Packet Capture Analysis
Paper # CS2018-69,IE2018-48
Date of Issue 2018-11-22 (CS, IE)

Conference Information
Committee CS / IE / IPSJ-AVM / ITE-BCT
Conference Date 2018/11/29(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Tokushima University (Memorial Hall of Almuni(Engineering))
Topics (in Japanese) (See Japanese page)
Topics (in English) Image coding, Communications and streaming technologies, etc.
Chair Hidenori Nakazato(Waseda Univ.) / Takayuki Hamamoto(Tokyo Univ. of Science) / Hideaki Kimata(NTT) / Tomoaki Otsuki(Keio Univ.)
Vice Chair Jun Terada(NTT) / Hideaki Kimata(NTT) / Kazuya Kodama(NII) / / Kyoichi Saito(NHK) / Yasushi Kasuga(TV Asahi) / Masayoshi Fukumoto(NEC)
Secretary Jun Terada(NTT) / Hideaki Kimata(Waseda Univ.) / Kazuya Kodama(KDDI Research) / (Nagoya Univ.) / Kyoichi Saito(NTT) / Yasushi Kasuga(Tokyo Univ. of Science) / Masayoshi Fukumoto(KDDI Research, Inc.)
Assistant Kazutaka Hara(NTT) / Kentaro Toyoda(Keio Univ.) / Kazuya Hayase(NTT) / Yasutaka Matsuo(NHK) / / Toshiharu Morizumi(NTT) / Takahiro Shiozawa(National Inst. of Tech., Kagawa College) / Shigeru Watanabe(Nihon Dengyo Kosaku) / Shinya Takeuchi(NHK) / Takao Tsuda(NHK)

Paper Information
Registration To Technical Committee on Communication Systems / Technical Committee on Image Engineering / Special Interest Group on Audio Visual and Multimedia Information Processing / Technical Group on Broadcasting Technology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Instantaneous Power-Line Frequency Synchronized Superimposed Chart of PLC System
Sub Title (in English) Part2: Verification of First Burst Signal Position Dependence
Keyword(1) PLC
Keyword(2) UDP
Keyword(3) Charger
Keyword(4) Communication forbidden time
Keyword(5) Instantaneous Power-Line Frequency Synchronized Superimposed Chart
Keyword(6) Packet Capture Analysis
1st Author's Name Hiroshi Gotoh
1st Author's Affiliation Toyo University(Toyo Univ.)
2nd Author's Name Wataru Abe
2nd Author's Affiliation Toyo University(Toyo Univ.)
3rd Author's Name Ryo Uemura
3rd Author's Affiliation Toyo University(Toyo Univ.)
4th Author's Name Kenji Kita
4th Author's Affiliation Toyo University(Toyo Univ.)
5th Author's Name Hiroyasu Ishikawa
5th Author's Affiliation Nihon University(Nihon Univ.)
6th Author's Name Hideyuki Shinonaga
6th Author's Affiliation Toyo University(Toyo Univ.)
Date 2018-11-29
Paper # CS2018-69,IE2018-48
Volume (vol) vol.118
Number (no) CS-328,IE-329
Page pp.pp.5-8(CS), pp.5-8(IE),
#Pages 4
Date of Issue 2018-11-22 (CS, IE)