| Presentation | 2018-10-29 Hardware Design of High Precision Discrete Gaussian Sampler for Lattice-based Cryptography Keitaro Koga, Awano Hiromitsu, Ikeda Makoto, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Since quantum computer is developed to be more practical, Post-Quantum Cryptography (PQC) that is not solved with quantum computer is more and more important. Lattice-based cryptography is very attractive as PQC. However, it has to sample random values from high-precise discrete gaussian and that is difficult phase of algorithm. In this paper, we propose hardware architecture of gaussian sampler that can generate arbitrary deviation gaussian samples by combining samples from fixed deviation gaussian sampler. Using this architectute, we show certain performance of lattice-based digital signature algorithm. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Lattice-based Cryptography / Discrete Gaussian Sampler / ASIC |
| Paper # | HWS2018-49,ICD2018-41 |
| Date of Issue | 2018-10-22 (HWS, ICD) |
| Conference Information | |
| Committee | HWS / ICD |
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| Conference Date | 2018/10/29(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kobe Univ. Umeda Intelligent Laboratory |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | HardwareSecurity, etc. |
| Chair | Tsutomu Matsumoto(Yokohama National Univ.) / Hideto Hidaka(Renesas) |
| Vice Chair | Shinichi Kawamura(Toshiba) / Makoto Ikeda(Univ. of Tokyo) / Makoto Nagata(Kobe Univ.) |
| Secretary | Shinichi Kawamura(Kobe Univ.) / Makoto Ikeda(SECOM) / Makoto Nagata(Panasonic) |
| Assistant | / Hiroyuki Ito(Tokyo Inst. of Tech.) / Masatoshi Tsuge(Socionext) / Tetsuya Hirose(Kobe Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on Integrated Circuits and Devices |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hardware Design of High Precision Discrete Gaussian Sampler for Lattice-based Cryptography |
| Sub Title (in English) | |
| Keyword(1) | Lattice-based Cryptography |
| Keyword(2) | Discrete Gaussian Sampler |
| Keyword(3) | ASIC |
| 1st Author's Name | Keitaro Koga |
| 1st Author's Affiliation | The University of Tokyo(UTokyo) |
| 2nd Author's Name | Awano Hiromitsu |
| 2nd Author's Affiliation | VLSI Design Education Center(VDEC) |
| 3rd Author's Name | Ikeda Makoto |
| 3rd Author's Affiliation | The University of Tokyo(UTokyo) |
| Date | 2018-10-29 |
| Paper # | HWS2018-49,ICD2018-41 |
| Volume (vol) | vol.118 |
| Number (no) | HWS-272,ICD-273 |
| Page | pp.pp.13-18(HWS), pp.13-18(ICD), |
| #Pages | 6 |
| Date of Issue | 2018-10-22 (HWS, ICD) |