Presentation 2018-07-31
Low-Latency Stream Data Join on Multiple FPGA Nodes
Koushi Matsushita, Celimuge WU, Tsutomu Yoshinaga,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper proposes an implementation of low-latency stream data join processing for multiple FPGA nodes. We reported implementations of Low-Latency Handshake Join on a single FPGA and a multi-node version of Handshake Join, each other, in the past. However, the former is not easy to extend for multi-node execution because of its complicated data management across the nodes. Therefore, we modified the original Low-Latency Handshake Join algorithm so as to eliminate complicated status management of tuple data across the nodes to be easily extendable for multi-node execution. Based on our experiment, we show that the proposed implementation achieves a comparable latency on a single node, as well as scalable performance gain on multiple nodes.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / join operation / stream data processing / Handshake Join / Low-Latency Handshake Join / multiple nodes
Paper # CPSY2018-17
Date of Issue 2018-07-23 (CPSY)

Conference Information
Committee CPSY / DC / IPSJ-ARC
Conference Date 2018/7/30(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kumamoto City International Center
Topics (in Japanese) (See Japanese page)
Topics (in English) Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
Chair Koji Nakano(Hiroshima Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Masahiro Goshima(NII)
Vice Chair Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Hiroshi Takahashi(Ehime Univ.)
Secretary Hidetsugu Irie(Utsunomiya Univ.) / Takashi Miyoshi(Hokkaido Univ.) / Hiroshi Takahashi(Tokyo Inst. of Tech.) / (Nihon Univ.)
Assistant Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.)

Paper Information
Registration To Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Low-Latency Stream Data Join on Multiple FPGA Nodes
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) join operation
Keyword(3) stream data processing
Keyword(4) Handshake Join
Keyword(5) Low-Latency Handshake Join
Keyword(6) multiple nodes
1st Author's Name Koushi Matsushita
1st Author's Affiliation The University of Electro-Communications(UEC)
2nd Author's Name Celimuge WU
2nd Author's Affiliation The University of Electro-Communications(UEC)
3rd Author's Name Tsutomu Yoshinaga
3rd Author's Affiliation The University of Electro-Communications(UEC)
Date 2018-07-31
Paper # CPSY2018-17
Volume (vol) vol.118
Number (no) CPSY-165
Page pp.pp.71-76(CPSY),
#Pages 6
Date of Issue 2018-07-23 (CPSY)