Presentation 2018-06-15
[Panel Discussion] The role of System and Signal Processing Subsociety
Satoshi Yamane, Hideaki Okazaki, Noriyuki Minegishi, Shogo Muramatsu, Morikazu Nakamura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) The four technical committees CAS, VLD, SIP, and MSS of System and Signal Processing Subsociety holds joint workshop since 2010. There holds a panel discussion with president of the Subsociety as a moderator and representatives of the four committees as panelists. In this panel discussion, we will deal with the roadmap of each of the committee and our Subsociety. The roadmap is "a general picture of a rough schedule until achievement after listing specific concrete achievement goals, listing what must be done after the goal is achieved, listing difficulties, prioritizing in time series ". By examining roadmaps of committees and our Subsociety, the collaboration between committees can be closely tightened, and the activities become more meaningful. However, it is difficult to complete the roadmap for our Subsociety suddenly this time, so we hope to discuss the challenge.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) System and Signal Processing Subsociety / Circuits and System / VLSI Design Technologies / Signal Processing / Mathematical Systems Science and Its Application
Paper # CAS2018-25,VLD2018-28,SIP2018-45,MSS2018-25
Date of Issue 2018-06-07 (CAS, VLD, SIP, MSS)

Conference Information
Committee CAS / SIP / MSS / VLD
Conference Date 2018/6/14(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Hokkaido Univ. (Frontier Research in Applied Sciences Build.)
Topics (in Japanese) (See Japanese page)
Topics (in English) System and Signal Processing, etc
Chair Hideaki Okazaki(Shonan Inst. of Tech.) / Shogo Muramatsu(Niigata Univ.) / Morikazu Nakamura(Univ. of Ryukyus) / Noriyuki Minegishi(Mitsubishi Electric)
Vice Chair Taizo Yamawaki(Hitachi) / Naoyuki Aikawa(TUS) / Kazunori Hayashi(Osaka City Univ) / Shigemasa Takai(Osaka Univ.) / Nozomu Togawa(Waseda Univ.)
Secretary Taizo Yamawaki(Shonan Inst. of Tech.) / Naoyuki Aikawa(Hitachi) / Kazunori Hayashi(Takushoku Univ.) / Shigemasa Takai(Hiroshima Univ.) / Nozomu Togawa(Toshiba)
Assistant Motoi Yamaguchi(Renesas Electronics) / / Hideki Kinjo(Okinawa Univ.)

Paper Information
Registration To Technical Committee on Circuits and Systems / Technical Committee on Signal Processing / Technical Committee on Mathematical Systems Science and its applications / Technical Committee on VLSI Design Technologies
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) [Panel Discussion] The role of System and Signal Processing Subsociety
Sub Title (in English) The roadmaps of groups and subsociety Part 1
Keyword(1) System and Signal Processing Subsociety
Keyword(2) Circuits and System
Keyword(3) VLSI Design Technologies
Keyword(4) Signal Processing
Keyword(5) Mathematical Systems Science and Its Application
1st Author's Name Satoshi Yamane
1st Author's Affiliation Kanazawa Univesity(Kanazawa Univ.)
2nd Author's Name Hideaki Okazaki
2nd Author's Affiliation Shonan Institute of Technology(Shonan Inst. of Tech.)
3rd Author's Name Noriyuki Minegishi
3rd Author's Affiliation MITSUBISHI ELECTRIC(Mitsubishi Electric)
4th Author's Name Shogo Muramatsu
4th Author's Affiliation Niigata University(Niigata Univ.)
5th Author's Name Morikazu Nakamura
5th Author's Affiliation University of the Ryukyus(Univ. of the Ryukyus)
Date 2018-06-15
Paper # CAS2018-25,VLD2018-28,SIP2018-45,MSS2018-25
Volume (vol) vol.118
Number (no) CAS-82,VLD-83,SIP-84,MSS-85
Page pp.pp.129-129(CAS), pp.129-129(VLD), pp.129-129(SIP), pp.129-129(MSS),
#Pages 1
Date of Issue 2018-06-07 (CAS, VLD, SIP, MSS)