| Presentation | 2018-03-02 Study on Speed Up of FDTD Analysis using in Parallel Computer Kazuki Kurihara, Takashi Kasuga, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | To process the high-speed for the big data, the signal frequency driven on the printed circuit board (PCB) is GHz band. When the signal frequency is higher, noise problem such as the noise radiation and crosstalk between lines is expanded. The electromagnetic simulator is used at the PCB design, and the results of the simulation is reflected to the PCB design. The purpose of this study is the develop of the electromagnetic noise simulator by the Finite Difference Time Domain (FDTD) method implemented in PCB design software. To make the software that not to be influence by the computer specification and the kind of operation system, the FDTD simulator implemented in the MATLAB is draw up. And processing speed of simulator is make higher. As the vector processing is applied the electric and magnetic calculation, the calculation time can be decreased by 90 %. The distributed processing is applied to the large scale arrays. The high-speed processing can be done at simple array. In the FDTD simulation, the processing time is increased. The high-speed processing of the free space calculation of FDTD simulation can be done. However, the calculation time on the absorbing boundary condition process is increased as the overhead. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FDTD analysis / printed circuit board, / MATLAB / vector processing / distributed processing |
| Paper # | EMD2017-64 |
| Date of Issue | 2018-02-23 (EMD) |
| Conference Information | |
| Committee | EMD |
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| Conference Date | 2018/3/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Nippon Institute of Technology |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Yoshiteru Abe(NTT) |
| Vice Chair | |
| Secretary | (NAIST) |
| Assistant | Yoshiki Kayano(Univ. of Electro-Comm.) |
| Paper Information | |
| Registration To | Technical Committee on Electromechanical Devices |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Study on Speed Up of FDTD Analysis using in Parallel Computer |
| Sub Title (in English) | |
| Keyword(1) | FDTD analysis |
| Keyword(2) | printed circuit board, |
| Keyword(3) | MATLAB |
| Keyword(4) | vector processing |
| Keyword(5) | distributed processing |
| 1st Author's Name | Kazuki Kurihara |
| 1st Author's Affiliation | National Institute Technology, Nagano College(NIT, Nagano) |
| 2nd Author's Name | Takashi Kasuga |
| 2nd Author's Affiliation | National Institute Technology, Nagano College(NIT, Nagano) |
| Date | 2018-03-02 |
| Paper # | EMD2017-64 |
| Volume (vol) | vol.117 |
| Number (no) | EMD-467 |
| Page | pp.pp.31-35(EMD), |
| #Pages | 5 |
| Date of Issue | 2018-02-23 (EMD) |