| Presentation | 2018-02-28 Architecture of Full-HD 60-fps Real-time Optical Flow Processor Satoshi Kanda, Kousuke Imamura, Yoshio Matsuda, Tetsuya Matsumura, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes the architecture design of Full-HD 60fps real-time optical flow processor. In this processor, the WXGA 30fps real-time processor previously proposed is re-designed as an IP(WXGA-IP), and it adopts a scalable multiprocessor structure. In addition, we newly proposed three methods such as improved hierarchical method, reduced iterative computation method by improving the initial value generation, and adaptive acceleration parameter selection method using built-in CPU. As a result, real-time processing of Full-HD 60fps which requires 4 times processing performance compared to WXGA-IP is realized with twice the hardware amount while maintaining the flow detection accuracy with the same operating frequency. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Optical flow / HOE algorithm / Adaptive control method / FPGA / Multiprocessor |
| Paper # | VLD2017-99 |
| Date of Issue | 2018-02-21 (VLD) |
| Conference Information | |
| Committee | VLD / HWS |
|---|---|
| Conference Date | 2018/2/28(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Hiroyuki Ochi(Ritsumeikan Univ.) |
| Vice Chair | Noriyuki Minegishi(Mitsubishi Electric) |
| Secretary | Noriyuki Minegishi(Hiroshima City Univ.) / (NTT) |
| Assistant | |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Hardware Security |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Architecture of Full-HD 60-fps Real-time Optical Flow Processor |
| Sub Title (in English) | |
| Keyword(1) | Optical flow |
| Keyword(2) | HOE algorithm |
| Keyword(3) | Adaptive control method |
| Keyword(4) | FPGA |
| Keyword(5) | Multiprocessor |
| 1st Author's Name | Satoshi Kanda |
| 1st Author's Affiliation | Nihon University(Nihon Univ.) |
| 2nd Author's Name | Kousuke Imamura |
| 2nd Author's Affiliation | Kanazawa University(Kanazawa Univ.) |
| 3rd Author's Name | Yoshio Matsuda |
| 3rd Author's Affiliation | Kanazawa University(Kanazawa Univ.) |
| 4th Author's Name | Tetsuya Matsumura |
| 4th Author's Affiliation | Nihon University(Nihon Univ.) |
| Date | 2018-02-28 |
| Paper # | VLD2017-99 |
| Volume (vol) | vol.117 |
| Number (no) | VLD-455 |
| Page | pp.pp.61-66(VLD), |
| #Pages | 6 |
| Date of Issue | 2018-02-21 (VLD) |