Presentation 2018-02-20
Note on Weighted Fault Coverage for Two-Pattern Tests
Masayuki Arai, Kazuhiko Iwasaki,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) hrinking feature size and higher integration on semiconductor device manufacturing technology bring a problem of the gap between the defect level estimated at the design stage from the reported one for fabricated devices. As one possible strategy to accurately estimate the defect level, authors have proposed weighted bridge/open fault coverage estimation, as well as test generation algorithms based on the weighted fault coverage. Previous work has only taken static fault models into account. In this study we introduce a fault model considering static and dynamic behavior of a defect, assuming that a part of behavior of a defect can only be observed as rise/fall delay. Targeting test pattern sets consisting of 2-pattern tests, we calculate weighted bridge/open fault coverage, and compare with conventional fault coverages based on delay and static fault models.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) weighted fault coverage / critical area / bridge fault / open fault / delay fault
Paper # DC2017-77
Date of Issue 2018-02-13 (DC)

Conference Information
Committee DC
Conference Date 2018/2/20(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Kikai-Shinko-Kaikan Bldg.
Topics (in Japanese) (See Japanese page)
Topics (in English) VLSI Design and Test, etc.
Chair Michiko Inoue(NAIST)
Vice Chair Satoshi Fukumoto(Tokyo Metropolitan Univ.)
Secretary Satoshi Fukumoto(Kyoto Sangyo Univ.)
Assistant Masayuki Arai(Nihon Univ.)

Paper Information
Registration To Technical Committee on Dependable Computing
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Note on Weighted Fault Coverage for Two-Pattern Tests
Sub Title (in English)
Keyword(1) weighted fault coverage
Keyword(2) critical area
Keyword(3) bridge fault
Keyword(4) open fault
Keyword(5) delay fault
1st Author's Name Masayuki Arai
1st Author's Affiliation Nihon University(Nihon Univ.)
2nd Author's Name Kazuhiko Iwasaki
2nd Author's Affiliation Tokyo Metropolitan University(Tokyo Metro. Univ.)
Date 2018-02-20
Paper # DC2017-77
Volume (vol) vol.117
Number (no) DC-444
Page pp.pp.1-6(DC),
#Pages 6
Date of Issue 2018-02-13 (DC)