Presentation 2018-01-18
Study on Deployment of a Computer Algebra System for Generating Random Test Patterns for Combinational Circuits
Tsutomu Inamoto, Yoshinobu Higami,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this study, the authors display an attempt of deploying a computer algebra system to improve the fault detection rate of test pattern sets for fault detection of combinational circuits. Partial derivatives are brought by representing logic expressions for external output lines of combinational circuits as polynomial expressions comprised of variables each of which corresponds to an external input line of circuits, and then by differentiating output polynomial expressions by input variables. The author speculates such partial derivatives hold some information useful for fault detection, because they correspond to boolean differences. According to this speculation, the number of variables contained in the partial derivative is picked up as a characteristics of that derivative. In computational results, the relation between that characteristics and the fault detection rate is investigated.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) combinational circuit / stuck-at fault / fault detection / polynomial / computer algebra system
Paper # MSS2017-57,SS2017-44
Date of Issue 2018-01-11 (MSS, SS)

Conference Information
Committee SS / MSS
Conference Date 2018/1/18(2days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Kazuhiro Ogata(JAIST) / Morikazu Nakamura(Univ. of Ryukyus)
Vice Chair Akio Nakata(Hiroshima City Univ.) / Shigemasa Takai(Osaka Univ.)
Secretary Akio Nakata(Tokyo Inst. of Tech.) / Shigemasa Takai(Osaka Univ.)
Assistant Kazuyuki Shima(Hiroshima City Univ.) / Hideki Kinjo(Okinawa Univ.)

Paper Information
Registration To Technical Committee on Software Science / Technical Committee on Mathematical Systems Science and its applications
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Study on Deployment of a Computer Algebra System for Generating Random Test Patterns for Combinational Circuits
Sub Title (in English)
Keyword(1) combinational circuit
Keyword(2) stuck-at fault
Keyword(3) fault detection
Keyword(4) polynomial
Keyword(5) computer algebra system
1st Author's Name Tsutomu Inamoto
1st Author's Affiliation Ehime University(Ehime Univ.)
2nd Author's Name Yoshinobu Higami
2nd Author's Affiliation Ehime University(Ehime Univ.)
Date 2018-01-18
Paper # MSS2017-57,SS2017-44
Volume (vol) vol.117
Number (no) MSS-380,SS-381
Page pp.pp.59-64(MSS), pp.59-64(SS),
#Pages 6
Date of Issue 2018-01-11 (MSS, SS)