Presentation | 2018-01-18 Examination of the Normally-off using the stack circuit Kenji Sakamura, Kazutami Arimoto, Isao Kayano, Tomoyuki Yokogawa, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In the stack circuit using charge recycling, low consumption electricity such as the streaming processing movement is effective for becoming it. On the other hand, the Normally-off is a technique to zero the consumption electricity at the time of the wait. I put these two techniques together and report the examination result about the control system of the Normally-off with the stack circuit for battery drive systems. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Normally-off computing / Stack circuit / Super capacitor |
Paper # | VLD2017-70,CPSY2017-114,RECONF2017-58 |
Date of Issue | 2018-01-11 (VLD, CPSY, RECONF) |
Conference Information | |
Committee | IPSJ-ARC / VLD / CPSY / RECONF / IPSJ-SLDM |
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Conference Date | 2018/1/18(2days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | FPGA Applications, etc |
Chair | Masahiro Goshima(NII) / Hiroyuki Ochi(Ritsumeikan Univ.) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Kiyoharu Hamaguchi(Shimane Univ.) |
Vice Chair | / Noriyuki Minegishi(Mitsubishi Electric) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) |
Secretary | (Kyushu Univ.) / Noriyuki Minegishi(Univ. of Tokyo) / Hidetsugu Irie(Toshiba) / Takashi Miyoshi(Nagoya Univ.) / Yuichiro Shibata(Hiroshima City Univ.) / Kentaro Sano(NTT) / (Utsunomiya Univ.) |
Assistant | / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) |
Paper Information | |
Registration To | Special Interest Group on System Architecture / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Special Interest Group on System and LSI Design Methodology |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Examination of the Normally-off using the stack circuit |
Sub Title (in English) | |
Keyword(1) | Normally-off computing |
Keyword(2) | Stack circuit |
Keyword(3) | Super capacitor |
1st Author's Name | Kenji Sakamura |
1st Author's Affiliation | Okayama Prefectural University(OPUGS) |
2nd Author's Name | Kazutami Arimoto |
2nd Author's Affiliation | Okayama Prefectural University(OPU) |
3rd Author's Name | Isao Kayano |
3rd Author's Affiliation | Okayama Prefectural University(OPU) |
4th Author's Name | Tomoyuki Yokogawa |
4th Author's Affiliation | Okayama Prefectural University(OPU) |
Date | 2018-01-18 |
Paper # | VLD2017-70,CPSY2017-114,RECONF2017-58 |
Volume (vol) | vol.117 |
Number (no) | VLD-377,CPSY-378,RECONF-379 |
Page | pp.pp.49-51(VLD), pp.49-51(CPSY), pp.49-51(RECONF), |
#Pages | 3 |
Date of Issue | 2018-01-11 (VLD, CPSY, RECONF) |