| Presentation | 2018-01-18 Distributed Memory Architecture for High-Level Synthesis from Erlang Kagumi Azuma, Shoki Hamana, Hidekazu Wakabayashi, Nagisa Ishiura, Nobuaki Yoshida, Hiroyuki Kanbara, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a distributed memory architecture for dedicatedhardware automatically synthesized from Erlang programs. Takebayashiet al. had developed a framework for generating embedded systems controllers whose behavior was specified by a subset of Erlang, where each process was mapped onto a hardware module running independently of those for the other processes. However, the resulting hardware was not of practical use because it shared a single main memory potentially accessed by all the process modules simultaneously. To address this issue, in this paper, the main memory is partitioned into banks so that each process can access its own memory independently of the other processes. In order to keep the interconnections for message passing and garbage collection to a practical size, a bus architecture is employed where requests for send and garbage collection are arbitrated by an arbiter module. From a simple Erlang specification consisting of 2 processes, a synthesizable Verilog HDL code has been generated whose behavior was confirmed by RTL simulation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | high-level synthesis / hardware/software codesign / embedded systems / Erlang / domain-specific language |
| Paper # | VLD2017-75,CPSY2017-119,RECONF2017-63 |
| Date of Issue | 2018-01-11 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | IPSJ-ARC / VLD / CPSY / RECONF / IPSJ-SLDM |
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| Conference Date | 2018/1/18(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Chair | Masahiro Goshima(NII) / Hiroyuki Ochi(Ritsumeikan Univ.) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Kiyoharu Hamaguchi(Shimane Univ.) |
| Vice Chair | / Noriyuki Minegishi(Mitsubishi Electric) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) |
| Secretary | (Kyushu Univ.) / Noriyuki Minegishi(Univ. of Tokyo) / Hidetsugu Irie(Toshiba) / Takashi Miyoshi(Nagoya Univ.) / Yuichiro Shibata(Hiroshima City Univ.) / Kentaro Sano(NTT) / (Utsunomiya Univ.) |
| Assistant | / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) |
| Paper Information | |
| Registration To | Special Interest Group on System Architecture / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Distributed Memory Architecture for High-Level Synthesis from Erlang |
| Sub Title (in English) | |
| Keyword(1) | high-level synthesis |
| Keyword(2) | hardware/software codesign |
| Keyword(3) | embedded systems |
| Keyword(4) | Erlang |
| Keyword(5) | domain-specific language |
| 1st Author's Name | Kagumi Azuma |
| 1st Author's Affiliation | Kwansei Gakuin University(Kwansei Gakuin Univ.) |
| 2nd Author's Name | Shoki Hamana |
| 2nd Author's Affiliation | Kwansei Gakuin University(Kwansei Gakuin Univ.) |
| 3rd Author's Name | Hidekazu Wakabayashi |
| 3rd Author's Affiliation | Kwansei Gakuin University(Kwansei Gakuin Univ.) |
| 4th Author's Name | Nagisa Ishiura |
| 4th Author's Affiliation | Kwansei Gakuin University(Kwansei Gakuin Univ.) |
| 5th Author's Name | Nobuaki Yoshida |
| 5th Author's Affiliation | Advanced Science, Technology & Management Research Institute of Kyoto(ASTEM) |
| 6th Author's Name | Hiroyuki Kanbara |
| 6th Author's Affiliation | Advanced Science, Technology & Management Research Institute of Kyoto(ASTEM) |
| Date | 2018-01-18 |
| Paper # | VLD2017-75,CPSY2017-119,RECONF2017-63 |
| Volume (vol) | vol.117 |
| Number (no) | VLD-377,CPSY-378,RECONF-379 |
| Page | pp.pp.77-82(VLD), pp.77-82(CPSY), pp.77-82(RECONF), |
| #Pages | 6 |
| Date of Issue | 2018-01-11 (VLD, CPSY, RECONF) |