| Presentation | 2017-12-14 Proposal of high precision skew adjustment method with an on-chip setup time measurement circuit Naoto Kamba, Masaki Ishii, Masahiro Sasaki, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, clock skew which can be tolerated is reduced because the operating speed of integrated circuits increase, therefore high precision skew reduction system is required. In this study, we propose a dynamic high precision skew adjustment circuit using timing error information measured by the on-chip relative setup time measurement circuit in order to reduce the slight skew remaining in the design stage and the skew caused by the manufacturing process. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | programmable delay line / skew adjustment / tspc d-ff / setup time |
| Paper # | CAS2017-84,ICD2017-72,CPSY2017-81 |
| Date of Issue | 2017-12-07 (CAS, ICD, CPSY) |
| Conference Information | |
| Committee | ICD / CPSY / CAS |
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| Conference Date | 2017/12/14(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Art Hotel Ishigakijima |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Hideto Hidaka(Renesas) / Koji Nakano(Hiroshima Univ.) / Mitsuru Hiraki(Renesas) |
| Vice Chair | Makoto Nagata(Kobe Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Hideaki Okazaki(Shonan Inst. of Tech.) |
| Secretary | Makoto Nagata(Univ. of Tokyo) / Hidetsugu Irie(Panasonic) / Takashi Miyoshi(Utsunomiya Univ.) / Hideaki Okazaki(Hokkaido Univ.) |
| Assistant | Masanori Natsui(Tohoku Univ.) / Masatoshi Tsuge(Socionext) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yohei Nakamura(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Integrated Circuits and Devices / Technical Committee on Computer Systems / Technical Committee on Circuits and Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Proposal of high precision skew adjustment method with an on-chip setup time measurement circuit |
| Sub Title (in English) | |
| Keyword(1) | programmable delay line |
| Keyword(2) | skew adjustment |
| Keyword(3) | tspc d-ff |
| Keyword(4) | setup time |
| 1st Author's Name | Naoto Kamba |
| 1st Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 2nd Author's Name | Masaki Ishii |
| 2nd Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 3rd Author's Name | Masahiro Sasaki |
| 3rd Author's Affiliation | Shibaura Institute of Technology(SIT) |
| Date | 2017-12-14 |
| Paper # | CAS2017-84,ICD2017-72,CPSY2017-81 |
| Volume (vol) | vol.117 |
| Number (no) | CAS-343,ICD-344,CPSY-345 |
| Page | pp.pp.97-97(CAS), pp.97-97(ICD), pp.97-97(CPSY), |
| #Pages | 1 |
| Date of Issue | 2017-12-07 (CAS, ICD, CPSY) |