Presentation 2017-11-16
Implementation and preliminary evaluation of low-latency network architecture
Krittin Intharawijitr, Katsuyoshi Iida, Hiroyuki Koga, Katsunori Yamaoka,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # IA2017-51
Date of Issue 2017-11-08 (IA)

Conference Information
Committee IA
Conference Date 2017/11/15(2days)
Place (in Japanese) (See Japanese page)
Place (in English) KMITL, Bangkok, Thailand
Topics (in Japanese) (See Japanese page)
Topics (in English) IA2017 - Workshop on Internet Architecture and Applications 2017
Chair Katsuyoshi Iida(Hokkaido Univ.)
Vice Chair Rei Atarashi(IIJ) / Hiroyuki Osaki(Kwansei Gakuin Univ.) / Tomoki Yoshihisa(Osaka Univ.)
Secretary Rei Atarashi(Tokyo Metropolitan Univ.) / Hiroyuki Osaki(TOYOTA-IT) / Tomoki Yoshihisa
Assistant Kenji Ohira(Tokushima Univ.) / Ryohei Banno(NTT) / Toshiki Watanabe(NEC)

Paper Information
Registration To Technical Committee on Internet Architecture
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementation and preliminary evaluation of low-latency network architecture
Sub Title (in English)
Keyword(1)
1st Author's Name Krittin Intharawijitr
1st Author's Affiliation Tokyo Institute of Technology(Tokyo Tech)
2nd Author's Name Katsuyoshi Iida
2nd Author's Affiliation Hokkaido University(Hokkaido Univ.)
3rd Author's Name Hiroyuki Koga
3rd Author's Affiliation University of Kitakyushu(Univ. of Kitakyushu)
4th Author's Name Katsunori Yamaoka
4th Author's Affiliation Tokyo Institute of Technology(Tokyo Tech)
Date 2017-11-16
Paper # IA2017-51
Volume (vol) vol.117
Number (no) IA-299
Page pp.pp.99-104(IA),
#Pages 6
Date of Issue 2017-11-08 (IA)