Presentation 2017-11-06
A shared memory chip for twin-tower of chips
Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Yusuke Matsushita, Naoki Ando, Mitaro Namiki, Hideharu Amano,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A shared memory chip for the building-block computing system using ThruChip Interface (TCI) is developed and evaluated.The implemented memory chip can connect two blocks of 3-D stacked chip blocks via TCI.Hence, using it as a bridge between these two blocks, a new 3-D integration System in a Package (SiP) which has twin-towers of chips can be realized. In this report, we reveal an architecture of the twin-tower for a SiP and evaluate its performance improvement.In our evaluation, the twin-tower system can improve 35% of system performance when compared to the conventional building-block computing system.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Building Block Computation System / TCI / Shared memory
Paper # VLD2017-34,DC2017-40
Date of Issue 2017-10-30 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2017/11/6(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kumamoto-Kenminkouryukan Parea
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2017 -New Field of VLSI Design-
Chair Hiroyuki Ochi(Ritsumeikan Univ.) / Michiko Inoue(NAIST) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Kiyoharu Hamaguchi(Shimane Univ.) / 渡辺 晴美(東海大) / Masahiro Goshima(NII)
Vice Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Kazuya Kodama(NII) / Hideaki Kimata(NTT)
Secretary Noriyuki Minegishi(Hiroshima City Univ.) / Satoshi Fukumoto(NTT) / Hidetsugu Irie(Kyoto Sangyo Univ.) / Takashi Miyoshi(Tokyo Inst. of Tech.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Kazuya Kodama(Nihon Univ.) / Hideaki Kimata(Toyohashi Univ. of Tech.) / (Univ. of Tokyo) / (Panasonic) / (Nagoya Univ.)
Assistant / Masayuki Arai(Nihon Univ.) / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yuichi Akage(NTT) / Masanori Natsui(Tohoku Univ.) / Masatoshi Tsuge(Socionext) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Yasutaka Matsuo(NHK) / Kazuya Hayase(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A shared memory chip for twin-tower of chips
Sub Title (in English)
Keyword(1) Building Block Computation System
Keyword(2) TCI
Keyword(3) Shared memory
1st Author's Name Sayaka Terashima
1st Author's Affiliation Keio University(Keio Univ.)
2nd Author's Name Takuya Kojima
2nd Author's Affiliation Keio University(Keio Univ.)
3rd Author's Name Hayate Okuhara
3rd Author's Affiliation Keio University(Keio Univ.)
4th Author's Name Yusuke Matsushita
4th Author's Affiliation Keio University(Keio Univ.)
5th Author's Name Naoki Ando
5th Author's Affiliation Keio University(Keio Univ.)
6th Author's Name Mitaro Namiki
6th Author's Affiliation Tokyo University of Agriculture and Technology(Tokyo Univ. of Agriculture and Tech.)
7th Author's Name Hideharu Amano
7th Author's Affiliation Keio University(Keio Univ.)
Date 2017-11-06
Paper # VLD2017-34,DC2017-40
Volume (vol) vol.117
Number (no) VLD-273,DC-274
Page pp.pp.43-48(VLD), pp.43-48(DC),
#Pages 6
Date of Issue 2017-10-30 (VLD, DC)