| Presentation | 2017-11-07 A PUF Based on the Instantaneous Response of Ring Oscillator Determined by the Convergence Time of Bistable Ring Oscillator Circuit Yuki Tanaka, Song Bian, Masayuki Hiromoto, Takashi Sato, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Studies on physical unclonable function (PUF) have been actively conducted as one of the countermeasures against counterfeited chips. PUF is a circuit that serves as a function which returns a response corresponding to a given challenge. In addition to uniqueness and reproducibility, resistance against machine learning attacks has been emphasized as an important metric to evaluate PUF. Most of existing PUFs are vulnerable to the machine learning attacks such as support vector machine (SVM). This paper proposes a PUF architecture that improves resistance against machine learning attacks. By utilizing the fact that the convergence time of a bistable ring circuit changes strongly nonlinearly with respect to threshold voltage variation, the proposed PUF generates response as an instantaneous value of a ring oscillator at a convergence time of the bistable ring running in parallel. Resistance against machine learning attacks as well as randomness, diffuseness, uniqueness, and reproducibility of the proposed PUF have been validated through SPICE simulations. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | PUF / Hardware Security / Ring Oscillator / Machine Learning |
| Paper # | VLD2017-40,DC2017-46 |
| Date of Issue | 2017-10-30 (VLD, DC) |
| Conference Information | |
| Committee | VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC |
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| Conference Date | 2017/11/6(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kumamoto-Kenminkouryukan Parea |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2017 -New Field of VLSI Design- |
| Chair | Hiroyuki Ochi(Ritsumeikan Univ.) / Michiko Inoue(NAIST) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Kiyoharu Hamaguchi(Shimane Univ.) / 渡辺 晴美(東海大) / Masahiro Goshima(NII) |
| Vice Chair | Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Kazuya Kodama(NII) / Hideaki Kimata(NTT) |
| Secretary | Noriyuki Minegishi(Hiroshima City Univ.) / Satoshi Fukumoto(NTT) / Hidetsugu Irie(Kyoto Sangyo Univ.) / Takashi Miyoshi(Tokyo Inst. of Tech.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Kazuya Kodama(Nihon Univ.) / Hideaki Kimata(Toyohashi Univ. of Tech.) / (Univ. of Tokyo) / (Panasonic) / (Nagoya Univ.) |
| Assistant | / Masayuki Arai(Nihon Univ.) / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yuichi Akage(NTT) / Masanori Natsui(Tohoku Univ.) / Masatoshi Tsuge(Socionext) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Yasutaka Matsuo(NHK) / Kazuya Hayase(NTT) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A PUF Based on the Instantaneous Response of Ring Oscillator Determined by the Convergence Time of Bistable Ring Oscillator Circuit |
| Sub Title (in English) | |
| Keyword(1) | PUF |
| Keyword(2) | Hardware Security |
| Keyword(3) | Ring Oscillator |
| Keyword(4) | Machine Learning |
| 1st Author's Name | Yuki Tanaka |
| 1st Author's Affiliation | Kyoto University(Kyoto Univ.) |
| 2nd Author's Name | Song Bian |
| 2nd Author's Affiliation | Kyoto University(Kyoto Univ.) |
| 3rd Author's Name | Masayuki Hiromoto |
| 3rd Author's Affiliation | Kyoto University(Kyoto Univ.) |
| 4th Author's Name | Takashi Sato |
| 4th Author's Affiliation | Kyoto University(Kyoto Univ.) |
| Date | 2017-11-07 |
| Paper # | VLD2017-40,DC2017-46 |
| Volume (vol) | vol.117 |
| Number (no) | VLD-273,DC-274 |
| Page | pp.pp.79-84(VLD), pp.79-84(DC), |
| #Pages | 6 |
| Date of Issue | 2017-10-30 (VLD, DC) |