Presentation 2017-11-06
Design Environment Construction for Three-Dimensional Sound Processor using High-Level Synthesis
Saya Ohira, Naoki Tsuchiya, Tetsuya Matsumura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A three-dimensional (3D) sound processor architecture that includes 3D sound processing intellectual property (IP) cores and super-directional modulation IP for consumer applications has been proposed previously. This processor can generate realistic small sound fields in arbitrary spaces by using ultrasound. The architecture is designed with high-level synthesis as the design methodology. We propose an automatic design environment for 3D sound processing IP of this processor. In this design environment, by describing the main parameters of the filter as an input file, it is possible to automatically generate high-level description of 3D sound processing IP in addition to verification by the C-based simulator. This makes it possible to automatically design RTL generation and logic synthesis afterwards and to design 3-D sound processing IP realizing required HRTF (Head Related Transfer Functions).
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Sound processer / Super-directional sound / 3-dimensional sound / High-level synthesis / FPGA
Paper # VLD2017-28,DC2017-34
Date of Issue 2017-10-30 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2017/11/6(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kumamoto-Kenminkouryukan Parea
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2017 -New Field of VLSI Design-
Chair Hiroyuki Ochi(Ritsumeikan Univ.) / Michiko Inoue(NAIST) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Kiyoharu Hamaguchi(Shimane Univ.) / 渡辺 晴美(東海大) / Masahiro Goshima(NII)
Vice Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Kazuya Kodama(NII) / Hideaki Kimata(NTT)
Secretary Noriyuki Minegishi(Hiroshima City Univ.) / Satoshi Fukumoto(NTT) / Hidetsugu Irie(Kyoto Sangyo Univ.) / Takashi Miyoshi(Tokyo Inst. of Tech.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Kazuya Kodama(Nihon Univ.) / Hideaki Kimata(Toyohashi Univ. of Tech.) / (Univ. of Tokyo) / (Panasonic) / (Nagoya Univ.)
Assistant / Masayuki Arai(Nihon Univ.) / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yuichi Akage(NTT) / Masanori Natsui(Tohoku Univ.) / Masatoshi Tsuge(Socionext) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Yasutaka Matsuo(NHK) / Kazuya Hayase(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design Environment Construction for Three-Dimensional Sound Processor using High-Level Synthesis
Sub Title (in English)
Keyword(1) Sound processer
Keyword(2) Super-directional sound
Keyword(3) 3-dimensional sound
Keyword(4) High-level synthesis
Keyword(5) FPGA
1st Author's Name Saya Ohira
1st Author's Affiliation Nihon University(Nihon Univ.)
2nd Author's Name Naoki Tsuchiya
2nd Author's Affiliation Nihon University(Nihon Univ.)
3rd Author's Name Tetsuya Matsumura
3rd Author's Affiliation Nihon University(Nihon Univ.)
Date 2017-11-06
Paper # VLD2017-28,DC2017-34
Volume (vol) vol.117
Number (no) VLD-273,DC-274
Page pp.pp.7-12(VLD), pp.7-12(DC),
#Pages 6
Date of Issue 2017-10-30 (VLD, DC)