| Presentation | 2017-11-07 Implementation and Optimization of Parallel Prefix Adder Using Majority Function Daiki Matsumoto, Masao Yanagisawa, Shinji Kimura, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent FPGAs and post CMOS devices, three-input majority operation can be e?ciently realized and circuit con?guration methods based on three-input majority operation are widely studied. Element reduction has been reported on adders and so on, but the precise construction method has not been shown. This manuscript shows a method of systematically realizing parallel pre?x adders using majority operations and a method of reducing majority operations using the property of carry propagation. By the proposed reduction method, we achieved reduction of the number of majority operations and the power delay product as compared with the systematic realization of parallel pre?x adders. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 3 input majority function / Parallel prefix adder / Majority-Inverter-Graph / Carry propagation as a majority operation |
| Paper # | VLD2017-46,DC2017-52 |
| Date of Issue | 2017-10-30 (VLD, DC) |
| Conference Information | |
| Committee | VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC |
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| Conference Date | 2017/11/6(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kumamoto-Kenminkouryukan Parea |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2017 -New Field of VLSI Design- |
| Chair | Hiroyuki Ochi(Ritsumeikan Univ.) / Michiko Inoue(NAIST) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Kiyoharu Hamaguchi(Shimane Univ.) / 渡辺 晴美(東海大) / Masahiro Goshima(NII) |
| Vice Chair | Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Kazuya Kodama(NII) / Hideaki Kimata(NTT) |
| Secretary | Noriyuki Minegishi(Hiroshima City Univ.) / Satoshi Fukumoto(NTT) / Hidetsugu Irie(Kyoto Sangyo Univ.) / Takashi Miyoshi(Tokyo Inst. of Tech.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Kazuya Kodama(Nihon Univ.) / Hideaki Kimata(Toyohashi Univ. of Tech.) / (Univ. of Tokyo) / (Panasonic) / (Nagoya Univ.) |
| Assistant | / Masayuki Arai(Nihon Univ.) / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yuichi Akage(NTT) / Masanori Natsui(Tohoku Univ.) / Masatoshi Tsuge(Socionext) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Yasutaka Matsuo(NHK) / Kazuya Hayase(NTT) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation and Optimization of Parallel Prefix Adder Using Majority Function |
| Sub Title (in English) | |
| Keyword(1) | 3 input majority function |
| Keyword(2) | Parallel prefix adder |
| Keyword(3) | Majority-Inverter-Graph |
| Keyword(4) | Carry propagation as a majority operation |
| 1st Author's Name | Daiki Matsumoto |
| 1st Author's Affiliation | Waseda University(Waseda Univ.) |
| 2nd Author's Name | Masao Yanagisawa |
| 2nd Author's Affiliation | Waseda University(Waseda Univ.) |
| 3rd Author's Name | Shinji Kimura |
| 3rd Author's Affiliation | Waseda University(Waseda Univ.) |
| Date | 2017-11-07 |
| Paper # | VLD2017-46,DC2017-52 |
| Volume (vol) | vol.117 |
| Number (no) | VLD-273,DC-274 |
| Page | pp.pp.109-114(VLD), pp.109-114(DC), |
| #Pages | 6 |
| Date of Issue | 2017-10-30 (VLD, DC) |