| Presentation | 2017-09-08 Joint State Estimation and Decoding of Low-Density Parity-Check Codes for Racetrack Memories Ryo Shibata, Gou Hosoya, Hiroyuki Yashima, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, a non-volatile memory with high density and low delay, called Racetrack Memory (RM), has attracted much attention. In RM, data is disturbed by shift operations resulting position errors, i.e. insertion/deletion errors. For a high speed reading in RM, reading of data with multiple read heads has been investigated. In this paper, we define a channel model of insertion/deletion errors with multiple read heads. Moreover, we propose a decoding algorithm of low-density parity-check (LDPC) codes for such channel. We show by simulations that bit error rate (BER) comparison in terms of different numbers of read heads and data size, and we show effectiveness of the proposed decoding algorithm. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | LDPC codes / insertion/deletion error / synchronization error / racetrack memory |
| Paper # | IT2017-45 |
| Date of Issue | 2017-09-01 (IT) |
| Conference Information | |
| Committee | IT |
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| Conference Date | 2017/9/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Centcore Yamaguchi Hotel |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | error correcting codes, general |
| Chair | Masayoshi Ohashi(Fukuoka Univ.) |
| Vice Chair | Jun Muramatsu(NTT) |
| Secretary | Jun Muramatsu(Yokohama College of Commerce) |
| Assistant | Sigeaki Kuzuoka(wakayama univ.) |
| Paper Information | |
| Registration To | Technical Committee on Information Theory |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Joint State Estimation and Decoding of Low-Density Parity-Check Codes for Racetrack Memories |
| Sub Title (in English) | |
| Keyword(1) | LDPC codes |
| Keyword(2) | insertion/deletion error |
| Keyword(3) | synchronization error |
| Keyword(4) | racetrack memory |
| 1st Author's Name | Ryo Shibata |
| 1st Author's Affiliation | Tokyo University of Science(TUS) |
| 2nd Author's Name | Gou Hosoya |
| 2nd Author's Affiliation | Tokyo University of Science(TUS) |
| 3rd Author's Name | Hiroyuki Yashima |
| 3rd Author's Affiliation | Tokyo University of Science(TUS) |
| Date | 2017-09-08 |
| Paper # | IT2017-45 |
| Volume (vol) | vol.117 |
| Number (no) | IT-208 |
| Page | pp.pp.37-42(IT), |
| #Pages | 6 |
| Date of Issue | 2017-09-01 (IT) |