| Presentation | 2017-09-25 A Study of Applicability of FPGA Dynamic Partial Reconfiguration Technique on COTS-based Carrier Network Equipment with HW/SW Co-design Scheme Toru Homemoto, Hisaharu Ishii, Toshiya Matsuda, Masaru Katayama, Kazuyuki Matsumura, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The authors consider applying FPGA Dynamic Partial Reconfiguration (DPR) technique to carrier network equipment built with FPGA accelerator board and OpenCL C based programming, to achieve reduction of compiling time of circuit configuration and In Service Software Upgrade (ISSU) without using duplicated data plane. In this paper, assembling DPR areas into a straight chain and applying one-liner programming scheme are introduced and evaluated through a partial implementation of them. The result shows the DPR areas with GNU coreutils base64 command are expected to be placed 21 stages without ISSU and 12 stages with ISSU on Intel Stratix V SGXEA7N FPGA with 50% utilization. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Network Processing / FPGA Dynamic Partial Reconfiguration / In Service Software Upgrade |
| Paper # | RECONF2017-25 |
| Date of Issue | 2017-09-18 (RECONF) |
| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2017/9/25(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | DWANGO Co., Ltd. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Chair | Masato Motomura(Hokkaido Univ.) |
| Vice Chair | Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) |
| Secretary | Yuichiro Shibata(Hiroshima City Univ.) / Kentaro Sano(e-trees.Japan) |
| Assistant | Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study of Applicability of FPGA Dynamic Partial Reconfiguration Technique on COTS-based Carrier Network Equipment with HW/SW Co-design Scheme |
| Sub Title (in English) | |
| Keyword(1) | Network Processing |
| Keyword(2) | FPGA Dynamic Partial Reconfiguration |
| Keyword(3) | In Service Software Upgrade |
| 1st Author's Name | Toru Homemoto |
| 1st Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 2nd Author's Name | Hisaharu Ishii |
| 2nd Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 3rd Author's Name | Toshiya Matsuda |
| 3rd Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 4th Author's Name | Masaru Katayama |
| 4th Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 5th Author's Name | Kazuyuki Matsumura |
| 5th Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| Date | 2017-09-25 |
| Paper # | RECONF2017-25 |
| Volume (vol) | vol.117 |
| Number (no) | RECONF-221 |
| Page | pp.pp.19-24(RECONF), |
| #Pages | 6 |
| Date of Issue | 2017-09-18 (RECONF) |