Presentation 2017-08-02
A Quadrature-modulation EPWM Transmitter with Parallel-Output MASH Delta-Sigma Modulator
Takumi Yamamoto, Yohtaro Umeda, Yusuke Kozawa,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this paper, Multi StAge Noise Shaping (MASH) architecture is employed to realize high noise reduction capability by noise shaping of ΔΣ modulator in quadrature-modulation envelope pulse width modulation (QM-EPWM). In the conventional ΔΣ modulator, it is disadvantageous that instability occurs in the third or higher order architecture. Therefore, by using MASH, it is possible to construct a modulator with high noise shaping with the same stability as the 1st-order one. However, as a harmful effect of using MASH, the output of the ΔΣ modulator is multi-level and it is impossible to digitally up-convert and output alternately using binary digital circuit. Therefore, in this paper we propose the parallel output MASH (PO-MASH) and QM-EPWM transmitter which use binary digital signal processing. However, since this uses a multi-level input digital amplifier. Therefore, we proposed using parallel / serial conversion not to use it. P/S is possible to up-convert and alternate output. We also performed a simulation using MATLAB. As a result, it was found that the modulation accuracy (EVM) relatively improved as compared with the transmitter using the conventional ΔΣ modulator.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) transmitter / quadrature-modulation envelope pulse width modulation / ΔΣ modulator / Multi StAge noise Shaping / parallel output MASH / parallel / serial conversion
Paper # SDM2017-48,ICD2017-36
Date of Issue 2017-07-24 (SDM, ICD)

Conference Information
Committee SDM / ICD / ITE-IST
Conference Date 2017/7/31(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Hokkaido-Univ. Multimedia Education Bldg.
Topics (in Japanese) (See Japanese page)
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low voltage/low power techniques, novel devices, circuits, and applications
Chair Tatsuya Kunikiyo(Renesas) / Hideto Hidaka(Renesas) / Shigetoshi Sugawa(Tohoku Univ.)
Vice Chair Takahiro Shinada(Tohoku Univ.) / Makoto Nagata(Kobe Univ.) / Takayuki Hamamoto(Tokyo University of Science) / Hiroshi Ohtake(NHK)
Secretary Takahiro Shinada(Tohoku Univ.) / Makoto Nagata(Renesas) / Takayuki Hamamoto(Univ. of Tokyo) / Hiroshi Ohtake(Panasonic)
Assistant Hiroya Ikeda(Shizuoka Univ.) / Tetsu Morooka(TOSHIBA MEMORY) / Masanori Natsui(Tohoku Univ.) / Masatoshi Tsuge(Socionext) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.)

Paper Information
Registration To Technical Committee on Silicon Device and Materials / Technical Committee on Integrated Circuits and Devices / Technical Group on Information Sensing Technologies
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Quadrature-modulation EPWM Transmitter with Parallel-Output MASH Delta-Sigma Modulator
Sub Title (in English)
Keyword(1) transmitter
Keyword(2) quadrature-modulation envelope pulse width modulation
Keyword(3) ΔΣ modulator
Keyword(4) Multi StAge noise Shaping
Keyword(5) parallel output MASH
Keyword(6) parallel / serial conversion
1st Author's Name Takumi Yamamoto
1st Author's Affiliation Tokyo University of Science(Tokyo Univ. of Science)
2nd Author's Name Yohtaro Umeda
2nd Author's Affiliation Tokyo University of Science(Tokyo Univ. of Science)
3rd Author's Name Yusuke Kozawa
3rd Author's Affiliation Ibaraki University(Ibaraki Univ.)
Date 2017-08-02
Paper # SDM2017-48,ICD2017-36
Volume (vol) vol.117
Number (no) SDM-166,ICD-167
Page pp.pp.123-128(SDM), pp.123-128(ICD),
#Pages 6
Date of Issue 2017-07-24 (SDM, ICD)