| Presentation | 2017-07-26 An Efficient GPU Implementation of Computing the Summed Area Table Yutaro Emoto, Takumi Honda, Koji Nakano, Yasuaki Ito, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The main contribution of this paper is to show an efficient GPU implementation of computing the summed area table. Existing implementations compute SAT in parallel dividing input matrix into submatrix. In the implementations, to synchronize the computation, the execution is divided into several kernels that are launched in serial. Our implementation adopts status flag to check the progress of computation and calls a kernel only once to compute SAT. In this paper, we show a GPU implementation that can perform a single kernel call on NVIDIA Titan X. The experimental results show that our SAT implementation runs faster at most 2.03 times than existing GPU implementations and 41.68 times faster than sequential algorithm using the CPU. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | summed area table / prefix-sum / GPU / CUDA |
| Paper # | CPSY2017-19 |
| Date of Issue | 2017-07-19 (CPSY) |
| Conference Information | |
| Committee | CPSY / DC / IPSJ-ARC |
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| Conference Date | 2017/7/26(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Akita Atorion-Building (Akita) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Parallel, Distributed and Cooperative Processing |
| Chair | Koji Nakano(Hiroshima Univ.) / Michiko Inoue(NAIST) |
| Vice Chair | Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) |
| Secretary | Hidetsugu Irie(Utsunomiya Univ.) / Takashi Miyoshi(Hokkaido Univ.) / Satoshi Fukumoto(Kyoto Sangyo Univ.) / (Tokyo Inst. of Tech.) |
| Assistant | Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Masayuki Arai(Nihon Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Efficient GPU Implementation of Computing the Summed Area Table |
| Sub Title (in English) | |
| Keyword(1) | summed area table |
| Keyword(2) | prefix-sum |
| Keyword(3) | GPU |
| Keyword(4) | CUDA |
| 1st Author's Name | Yutaro Emoto |
| 1st Author's Affiliation | Hiroshima University(Hiroshima Univ.) |
| 2nd Author's Name | Takumi Honda |
| 2nd Author's Affiliation | Hiroshima University(Hiroshima Univ.) |
| 3rd Author's Name | Koji Nakano |
| 3rd Author's Affiliation | Hiroshima University(Hiroshima Univ.) |
| 4th Author's Name | Yasuaki Ito |
| 4th Author's Affiliation | Hiroshima University(Hiroshima Univ.) |
| Date | 2017-07-26 |
| Paper # | CPSY2017-19 |
| Volume (vol) | vol.117 |
| Number (no) | CPSY-153 |
| Page | pp.pp.19-24(CPSY), |
| #Pages | 6 |
| Date of Issue | 2017-07-19 (CPSY) |