Presentation 2017-05-22
CNN implementation on FPGA with Power of 2 Approximation of Weight
Takahiro Utsunomiya, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Convolutional Neural Network (CNN), a method of Image recognition, is utilized in various fields. Considering CNN implementation to embedded devices, Field Programmable Gate Array (FPGA) is one of the promising medium. The feature of FPGA is high speed processing with low power. There are enormous number of multiply-add operations in Fully Connected (FC) layers of CNN. Therefore, for CNN implementation on FPGA, it is required to consider the resource utilization of multiply-add circuit and memory access for weight of neural network. In this paper, we propose power of 2 approximation of weight in FC layers of CNN. This method enables multiply-add circuit to be configured by Shifter and Adder. Our proposed method improved LUT consumption up to 10.7 times and operating frequency up to 2.6 times. Furthermore, the bit width required for weight was reduced to 3 bits. In this case, deterioration of recognition accuracy was suppressed to about 1%.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / Deep Learning / CNN
Paper # RECONF2017-6
Date of Issue 2017-05-15 (RECONF)

Conference Information
Committee RECONF / CPSY / DC / IPSJ-ARC
Conference Date 2017/5/22(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Noboribetsu-Onsen Dai-ichi-Takimoto-Kan
Topics (in Japanese) (See Japanese page)
Topics (in English) HotSPA2017: Reconfigurable System, Dependable Computing System, and General Topics
Chair Minoru Watanabe(Shizuoka Univ.) / Yasuhiko Nakashima(NAIST) / Michiko Inoue(NAIST)
Vice Chair Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Satoshi Fukumoto(Tokyo Metropolitan Univ.)
Secretary Masato Motomura(Univ. of Tsukuba) / Yuichiro Shibata(Hiroshima City Univ.) / Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(NII) / Satoshi Fukumoto(Kyoto Sangyo Univ.) / (Tokyo Inst. of Tech.)
Assistant Takefumi Miyoshi(e-trees.Japan) / Yuuki Kobayashi(NEC) / Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(Hokkaido Univ.)

Paper Information
Registration To Technical Committee on Reconfigurable Systems / Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) CNN implementation on FPGA with Power of 2 Approximation of Weight
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Deep Learning
Keyword(3) CNN
1st Author's Name Takahiro Utsunomiya
1st Author's Affiliation Kumamoto University(Kumamoto Univ.)
2nd Author's Name Motoki Amagasaki
2nd Author's Affiliation Kumamoto University(Kumamoto Univ.)
3rd Author's Name Masahiro Iida
3rd Author's Affiliation Kumamoto University(Kumamoto Univ.)
4th Author's Name Morihiro Kuga
4th Author's Affiliation Kumamoto University(Kumamoto Univ.)
5th Author's Name Toshinori Sueyoshi
5th Author's Affiliation Kumamoto University(Kumamoto Univ.)
Date 2017-05-22
Paper # RECONF2017-6
Volume (vol) vol.117
Number (no) RECONF-46
Page pp.pp.25-30(RECONF),
#Pages 6
Date of Issue 2017-05-15 (RECONF)