| 講演名 | 2017-05-19 Common-Mode Noise Filter Design based on Defected Ground Structure (DGS) for Multilayer PCBs Hui Min Lee(A*STAR IHPC), Si-Ping Gao(A*STAR IHPC), Richard Xian-Ke Gao(A*STAR IHPC), En Xiao Liu(A*STAR IHPC), |
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| 抄録(和) | As the operating frequency increases, implementation of noise suppression techniques is important to ensure power and signal integrity of the whole electronic system. Particularly, common-mode noise is critical in high-speed differential signaling systems. Recently, defected ground structure (DGS) is proposed as a promising alternative to commonly used approaches such as common-mode choke, because it is applicable to GHz range and allows a compact filter size. DGS common-mode filters have been shown to perform well in two-layer PCB environments without affecting the differential signals. However, the performance of these conventional DGS filters is significantly degraded in multilayer PCBs due to the ground bounce noises generated between the layer with DGS and the power/ground plane below. Hence, in this work, a novel cavity-backed DGS filter design consisting of a conventional DGS and a substrate-filled metallic cavity is proposed for effective common-mode noise suppression for high-speed multilayer PCBs. |
| 抄録(英) | As the operating frequency increases, implementation of noise suppression techniques is important to ensure power and signal integrity of the whole electronic system. Particularly, common-mode noise is critical in high-speed differential signaling systems. Recently, defected ground structure (DGS) is proposed as a promising alternative to commonly used approaches such as common-mode choke, because it is applicable to GHz range and allows a compact filter size. DGS common-mode filters have been shown to perform well in two-layer PCB environments without affecting the differential signals. However, the performance of these conventional DGS filters is significantly degraded in multilayer PCBs due to the ground bounce noises generated between the layer with DGS and the power/ground plane below. Hence, in this work, a novel cavity-backed DGS filter design consisting of a conventional DGS and a substrate-filled metallic cavity is proposed for effective common-mode noise suppression for high-speed multilayer PCBs. |
| キーワード(和) | common-mode noise / defected ground structure / multilayer PCBs |
| キーワード(英) | common-mode noise / defected ground structure / multilayer PCBs |
| 資料番号 | EMCJ2017-17 |
| 発行日 | 2017-05-11 (EMCJ) |
| 研究会情報 | |
| 研究会 | EMCJ / IEE-EMC / IEE-MAG |
|---|---|
| 開催期間 | 2017/5/18(から2日開催) |
| 開催地（和） | 南洋理工大学 |
| 開催地（英） | Nanyang Technological University |
| テーマ（和） | EMC Joint Workshop, 2017, Singapore |
| テーマ（英） | EMC Joint Workshop, 2017, Singapore |
| 委員長氏名（和） | 曽根 秀昭(東北大) / 川又 憲(東北学院大) / 山口 正洋(東北大) |
| 委員長氏名（英） | Hideaki Sone(Tohoku Univ.) / Ken Kawamata(Tohoku-gakuin Univ.) / Masahiro Yamaguchi(Tohoku Univ.) |
| 副委員長氏名（和） | 和田 修己(京大) |
| 副委員長氏名（英） | Osami Wada(Kyoto Univ.) |
| 幹事氏名（和） | 森岡 健浩(産総研) / 大坂 英樹(日立オートモティブシステムズ) / 牛尾 知雄(阪大) / 関口 秀紀(海技研) / 小原 学(明治大) |
| 幹事氏名（英） | Takehiro Morioka(AIST) / Hideki Osaka(Hitachi Automotive Systems) / Tomoo Ushio(Osaka Univ.) / Hidenori Sekiguchi(NMRI) / Gaku Obara(Meji Univ.) |
| 幹事補佐氏名（和） | 萓野 良樹(電通大) / 勝部 勇作(日立オートモティブシステムズ) / 佐々木 智江(パナソニック) / 井渕 貴章(阪大) / 山田 啓壽(東芝) |
| 幹事補佐氏名（英） | Yoshiki Kayano(Univ. of Electro-Comm.) / Yusaku Katsube(Hitachi) / Chie Sasaki(Panasonic) / Takaaki Ibuchi(Osaka Univ.) / Keiju Yamada(Toshiba Co.) |
| 講演論文情報詳細 | |
| 申込み研究会 | Technical Committee on Electromagnetic Compatibility / Technical Meeting on Electromagnetic Compatibility / Technical Meeting on Magnetics |
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| 本文の言語 | ENG |
| タイトル（和） | |
| サブタイトル（和） | |
| タイトル（英） | Common-Mode Noise Filter Design based on Defected Ground Structure (DGS) for Multilayer PCBs |
| サブタイトル（和） | |
| キーワード(1)（和/英） | common-mode noise / common-mode noise |
| キーワード(2)（和/英） | defected ground structure / defected ground structure |
| キーワード(3)（和/英） | multilayer PCBs / multilayer PCBs |
| 第 1 著者 氏名（和/英） | Hui Min Lee / Hui Min Lee |
| 第 1 著者 所属（和/英） | A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) |
| 第 2 著者 氏名（和/英） | Si-Ping Gao / Si-Ping Gao |
| 第 2 著者 所属（和/英） | A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) |
| 第 3 著者 氏名（和/英） | Richard Xian-Ke Gao / Richard Xian-Ke Gao |
| 第 3 著者 所属（和/英） | A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) |
| 第 4 著者 氏名（和/英） | En Xiao Liu / En Xiao Liu |
| 第 4 著者 所属（和/英） | A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) A*STAR Institute of High Performance Computing(略称：A*STAR IHPC) |
| 発表年月日 | 2017-05-19 |
| 資料番号 | EMCJ2017-17 |
| 巻番号（vol） | vol.117 |
| 号番号（no） | EMCJ-32 |
| ページ範囲 | pp.57-61(EMCJ), |
| ページ数 | 5 |
| 発行日 | 2017-05-11 (EMCJ) |