Presentation 2017-03-03
Acceleration of Dehazing Processing Based on Min-Max Bilateral Filter on an Embedded System
Ayaka Yasuda, Shota Furukawa, Noriaki Suetake, Takanori Koga,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Currently, researches on dehazing processing to remove haze such as fog included in images have been actively conducted. When dehazing systems are used for actual applications such as video surveillance and in-vehicle cameras, those should be implemented with simple and inexpensive embedded equipments. Furthermore, in such implementation, it must be applicable to video streams. Therefore, in this research, we implement a dehazing processing in an embedded system and verify the adequate algorithm and the effective implementation of parallel computation to realize real-time processing.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Haze removal / Min-Max bilateral filter / Embedded System / Real-time processing / Parallel computing / GPGPU
Paper # SIS2016-56
Date of Issue 2017-02-23 (SIS)

Conference Information
Committee SIS
Conference Date 2017/3/2(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Kanagawa Inst. Tech. Yokohama Office
Topics (in Japanese) (See Japanese page)
Topics (in English) Soft Computing, etc.
Chair Hirokazu Tanaka(Hiroshima City Univ.)
Vice Chair Takayuki Nakachi(NTT) / Noriaki Suetake(Yamaguchi Univ.)
Secretary Takayuki Nakachi(Toshiba) / Noriaki Suetake(Kanagawa Inst. of Tech.)
Assistant Hakaru Tamukoh(Kyushu Inst. of Tech.) / Masaaki Fujiyoshi(Tokyo Metropolitan Univ.)

Paper Information
Registration To Technical Committee on Smart Info-Media Systems
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Acceleration of Dehazing Processing Based on Min-Max Bilateral Filter on an Embedded System
Sub Title (in English)
Keyword(1) Haze removal
Keyword(2) Min-Max bilateral filter
Keyword(3) Embedded System
Keyword(4) Real-time processing
Keyword(5) Parallel computing
Keyword(6) GPGPU
1st Author's Name Ayaka Yasuda
1st Author's Affiliation National Institute of Technology, Tokuyama College(NIT, Tokuyama Col.)
2nd Author's Name Shota Furukawa
2nd Author's Affiliation Yamaguchi University(Yamaguchi Univ.)
3rd Author's Name Noriaki Suetake
3rd Author's Affiliation Yamaguchi University(Yamaguchi Univ.)
4th Author's Name Takanori Koga
4th Author's Affiliation National Institute of Technology, Tokuyama College(NIT, Tokuyama Col.)
Date 2017-03-03
Paper # SIS2016-56
Volume (vol) vol.116
Number (no) SIS-482
Page pp.pp.83-86(SIS),
#Pages 4
Date of Issue 2017-02-23 (SIS)