Presentation 2017-03-03
Verification of Precise of Clock Synchronization using IEEE 1588 in Network Composed of Ordinary Routers
Koki Horita, Shota Shiobara, Takao Okamawari, Fumio Teraoka, Kunitake Kaneko,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In these days, demands for highly precise clock synchronization have been increasing. IEEE1588 (PTP), which aims for sub-microseconds levels of clock synchronization on a network, is featured in various area. Time error of clock synchronization using network is caused by various factors. Without examining characteristic of implicating factor, it is not possible to build a precise clock synchronization network. This paper focused on packet delay varia- tion (PDV) on network equipment, which is considered as a major factor implicating the accuracy, and measured a time error of IEEE1588 on ordinary routers. We generated background traffic, which increases variation of delay in routers, and the accuracy is evaluated by 3 metrics: Accuracy, Precision, Stability. This paper showed the accuracy is not impacted by background traffic when the number of routes was one. In situation that the number of routers was more than two, the accuracy was implicated by background traffic; when there were 5 routers between master and slave clock, its accuracy was 1.5 microseconds.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) IEEE1588 / Clock synchronization / Time Error
Paper # SITE2016-62,IA2016-92
Date of Issue 2017-02-24 (SITE, IA)

Conference Information
Committee IA / SITE / IPSJ-IOT
Conference Date 2017/3/3(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Culture Resort Festone (Okinawa)
Topics (in Japanese) (See Japanese page)
Topics (in English) Internet and Information Ethics Education, etc.
Chair Ken-ichi Yoshida(Univ. of Tsukuba) / Hitoshi Okada(NII)
Vice Chair Hiroyuki Osaki(Kwansei Gakuin Univ.) / Masahiro Jibiki(NICT) / Tomoki Yoshihisa(Osaka Univ.) / Tetsuya Morizumi(Kanagawa Univ.) / Masaru Ogawa(Kobe Gakuin Univ.)
Secretary Hiroyuki Osaki(Tokyo Inst. of Tech.) / Masahiro Jibiki(Ritsumeikan Univ.) / Tomoki Yoshihisa(Kyushu Univ.) / Tetsuya Morizumi(Gifu Shotoku Gakuen Univ.) / Masaru Ogawa
Assistant Yusuke Sakumoto(Tokyo Metropolitan Univ.) / Yuichiro Hei(KDDI R&D Labs.) / Toshiki Watanabe(NEC) / Kanako Kawaguchi(Tokyo Univ. of the Arts) / Akiyoshi Kabeya(Chiba Univ.)

Paper Information
Registration To Technical Committee on Internet Architecture / Technical Committee on Social Implications of Technology and Information Ethics / Special Interest Group on Internet and Operation Technology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Verification of Precise of Clock Synchronization using IEEE 1588 in Network Composed of Ordinary Routers
Sub Title (in English)
Keyword(1) IEEE1588
Keyword(2) Clock synchronization
Keyword(3) Time Error
1st Author's Name Koki Horita
1st Author's Affiliation Graduated School of Science and Engineering, Keio University(Keio Univ.)
2nd Author's Name Shota Shiobara
2nd Author's Affiliation SOFTBANK Corp.(Softbank)
3rd Author's Name Takao Okamawari
3rd Author's Affiliation SOFTBANK Corp.(Softbank)
4th Author's Name Fumio Teraoka
4th Author's Affiliation Keio University(Keio Univ.)
5th Author's Name Kunitake Kaneko
5th Author's Affiliation Keio University(Keio Univ.)
Date 2017-03-03
Paper # SITE2016-62,IA2016-92
Volume (vol) vol.116
Number (no) SITE-490,IA-491
Page pp.pp.13-18(SITE), pp.13-18(IA),
#Pages 6
Date of Issue 2017-02-24 (SITE, IA)